Stretchable form of single crystal silicon for high performance electronics on rubber substrates

ABSTRACT

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

CROSS REFERENCE TO RELATED APPLICATIONS

This application is a continuation of U.S. patent application Ser. No.14/220,923 filed Mar. 20, 2014, which is a continuation of U.S. patentapplication Ser. No. 13/441,618 filed Apr. 6, 2012 (now U.S. Pat. No.8,754,396 Issued Jun. 17, 2014), which is a continuation of U.S. patentapplication Ser. No. 12/405,475 filed Mar. 17, 2009 (now U.S. Pat. No.8,198,621 issued Jun. 12, 2012), which is a divisional of U.S. patentapplication Ser. No. 11/423,287 filed on Jun. 9, 2006 (now U.S. Pat. No.7,521,292 issued Apr. 21, 2009), which is a continuation-in-part of U.S.patent application Ser. No. 11/145,542 filed Jun. 2, 2005 (now U.S. Pat.No. 7,557,367 issued Jul. 7, 2009) and U.S. patent application Ser. No.11/145,574 filed Jun. 2, 2005 (now U.S. Pat. No. 7,622,367 issued Nov.24, 2009), both of which claim the benefit under 35 U.S.C. 119(e) ofU.S. Provisional Patent Application Nos. 60/577,077, 60/601,061,60/650,305, 60/663,391 and 60/677,617 filed on Jun. 4, 2004, Aug. 11,2004, Feb. 4, 2005, Mar. 18, 2005, and May 4, 2005, respectively, andapplication Ser. No. 11/423,287 (now U.S. Pat. No. 7,521,292 issued Apr.21, 2009) also claims the benefit under 35 U.S.C. 119(e) of U.S.Provisional Patent Application No. 60/790,104 filed on Apr. 7, 2006, allof which are hereby incorporated by reference in their entireties to theextent not inconsistent with the disclosure herein.

STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT

This invention was made, at least in part, with United Statesgovernmental support awarded by DARPA-funded AFRL-managedMacroelectronics Program Contract FA8650-04-C-7101, and the U.S.Department of Energy under grant DEFG02-91-ER45439. The United StatesGovernment has certain rights in this invention.

BACKGROUND OF INVENTION

Since the first demonstration of a printed, all polymer transistor in1994, a great deal of interest has been directed at a potential newclass of electronic systems comprising flexible integrated electronicdevices on plastic substrates. [Garnier, F., Hajlaoui, R., Yassar, A.and Srivastava, P., Science, Vol. 265, pgs 1684-1686] Recently,substantial research has been directed toward developing new solutionprocessable materials for conductors, dielectrics and semiconductorselements for flexible plastic electronic devices. Progress in the fieldof flexible electronics, however, is not only driven by the developmentof new solution processable materials but also by new device componentgeometries, efficient device and device component processing methods andhigh resolution patterning techniques applicable to plastic substrates.It is expected that such materials, device configurations andfabrication methods will play an essential role in the rapidly emergingnew class of flexible integrated electronic devices, systems andcircuits.

Interest in the field of flexible electronics arises out of severalimportant advantages provided by this technology. First, the mechanicalruggedness of plastic substrate materials provides electronic devicesless susceptible to damage and/or electronic performance degradationcaused by mechanical stress. Second, the inherent flexibility of thesesubstrate materials allows them to be integrated into many shapesproviding for a large number of useful device configurations notpossible with brittle conventional silicon based electronic devices.Finally, the combination of solution processable component materials andplastic substrates enables fabrication by continuous, high speed,printing techniques capable of generating electronic devices over largesubstrate areas at low cost.

The design and fabrication of flexible electronic devices exhibitinggood electronic performance, however, present a number of significantchallenges. First, the well developed methods of making conventionalsilicon based electronic devices are incompatible with most plasticmaterials. For example, traditional high quality inorganic semiconductorcomponents, such as single crystalline silicon or germaniumsemiconductors, are typically processed by growing thin films attemperatures (>1000 degrees Celsius) that significantly exceed themelting or decomposition temperatures of most plastic substrates. Inaddition, most inorganic semiconductors are not intrinsically soluble inconvenient solvents that would allow for solution based processing anddelivery. Second, although many amorphous silicon, organic or hybridorganic-inorganic semiconductors are compatible with incorporation intoplastic substrates and can be processed at relatively low temperatures,these materials do not have electronic properties capable of providingintegrated electronic devices capable of good electronic performance.For example, thin film transistors having semiconductor elements made ofthese materials exhibit field effect mobilities approximately threeorders of magnitude less than complementary single crystalline siliconbased devices. As a result of these limitations, flexible electronicdevices are presently limited to specific applications not requiringhigh performance, such as use in switching elements for active matrixflat panel displays with non-emissive pixels and in light emittingdiodes.

Progress has recently been made in extending the electronic performancecapabilities of integrated electronic devices on plastic substrates toexpand their applicability to a wider range of electronics applications.For example, several new thin film transistor (TFT) designs have emergedthat are compatible with processing on plastic substrate materials andexhibit significantly higher device performance characteristics thanthin film transistors having amorphous silicon, organic or hybridorganic-inorganic semiconductor elements. One class of higher performingflexible electronic devices is based on polycrystalline silicon thinfilm semiconductor elements fabricated by pulse laser annealing ofamorphous silicon thin films. While this class of flexible electronicdevices provides enhanced device electronic performance characteristics,use of pulsed laser annealing limits the ease and flexibility offabrication of such devices, thereby significantly increasing costs.Another promising new class of higher performing flexible electronicdevices is devices that employ solution processable nanoscale materials,such as nanowires, nanoribbons, nanoparticles and carbon nanotubes, asactive functional components in a number of macroelectronic andmicroelectronic devices.

Use of discrete single crystalline nanowires or nanoribbons has beenevaluated as a possible means of providing printable electronic deviceson plastic substrates that exhibit enhanced device performancecharacteristics. Duan et al. describe thin film transistor designshaving a plurality of selectively oriented single crystalline siliconnanowires or CdS nanoribbons as semiconducting channels [Duan, X., Niu,C., Sahl, V., Chen, J., Parce, J., Empedocles, S. and Goldman, J.,Nature, Vol. 425, pgs, 274-278]. The authors report a fabricationprocess allegedly compatible with solution processing on plasticsubstrates in which single crystalline silicon nanowires or CdSnanoribbons having thicknesses less than or equal to 150 nanometers aredispersed into solution and assembled onto the surface of a substrateusing flow-directed alignment methods to produce the semiconductingelement of at thin film transistor. An optical micrograph provided bythe authors suggests that the disclosed fabrication process prepares amonolayer of nanowires or nanoribbons in a substantially parallelorientation and spaced apart by about 500 nanometers to about 1,000nanometers. Although the authors report relatively high intrinsic fieldaffect mobilities for individual nanowires or nanoribbons (≈119 cm² V⁻¹s⁻¹), the overall device field effect mobility has recently beendetermined to be “approximately two orders of magnitude smaller” thanthe intrinsic field affect mobility value reported by Duan et al.[Mitzi, D. B, Kosbar, L. L., Murray, C. E., Copel, M. Afzali, A.,Nature, Vol. 428, pgs. 299-303]. This device field effect mobility isseveral orders of magnitude lower than the device field effectmobilities of conventional single crystalline inorganic thin filmtransistors, and is likely due to practical challenges in aligning,densely packing and electrically contacting discrete nanowires ornanoribbons using the methods and device configurations disclosed inDuan et al.

Use of nanocrystal solutions as precursors to polycrystalline inorganicsemiconductor thin films has also been explored as a possible means ofproviding printable electronic devices on plastic substrates thatexhibit higher device performance characteristics. Ridley et al.disclose a solution processing fabrication method wherein a solutioncadmium selenide nanocrystals having dimensions of about 2 nanometers isprocessed at plastic compatible temperatures to provide a semiconductorelement for a field effect transistor. [Ridley, B. A., Nivi, B. andJacobson, J. M., Science, Vo. 286, 746-749 (1999)] The authors report amethod wherein low temperature grain growth in a nanocrystal solution ofcadmium selenide provides single crystal areas encompassing hundreds ofnanocrystals. Although Ridley et al. report improved electronicproperties relative to comparable devices having organic semiconductorelements, the device mobilities achieved by these techniques (≈1 cm² V⁻¹s⁻¹) are several orders of magnitude lower than the device field effectmobilities of conventional single crystalline inorganic thin filmtransistors. Limits on the field effect mobilities achieved by thedevice configurations and fabrication methods of Ridley et al. arelikely to arise from the electrical contact established betweenindividual nanoparticles. Particularly, the use of organic end groups tostabilize nanocrystal solutions and prevent agglomeration may impedeestablishing good electrical contact between adjacent nanoparticles thatis necessary for providing high device field effect mobilities.

Although Duan et al. and Ridley et al. provide methods for fabricatingthin film transistors on plastic substrates, the device configurationsdescribed are transistors comprising mechanically rigid devicecomponents, such as electrodes, semiconductors and/or dielectrics.Selection of a plastic substrate with good mechanical properties mayprovide electronic devices capable of performing in flexed or distortedorientations, however, such deformation is expected to generatemechanical strain on the individual rigid transistor device components.This mechanical strain may induce damage to individual components, forexample by cracking, and also may degrade or disrupt electrical contactbetween device components.

Moreover, it is unclear if the plastic substrate-based electronicsystems developed by Duan et al., Ridley et al. and others providemechanical extensibility necessary for many important deviceapplications, including flexible sensor arrays, electronic paper, andwearable electronic devices. While these groups demonstrate electronicdevices having the ability to undergo deformation caused by flexing, itis unlikely that these plastic substrate-based systems are capable ofstretching appreciably without damage, mechanical failure or significantdegradation in device performance. Therefore, it is unlikely that thesesystems are capable of deformation caused by expansion or compression,or capable of deformation required to conformally cover highly contouredsurfaces, such as curved surfaces having a large radius of curvature.

As discussed above, progress in the field of flexible electronics isexpected to play a critical role in a number of important emerging andestablished technologies. The success of these applications of flexibleelectronics technology depends strongly, however, on the continueddevelopment of new materials, device configurations and commerciallyfeasible fabrication pathways for making integrated electronic circuitsand devices exhibiting good electronic, mechanical and opticalproperties in flexed, deformed and bent conformations. Particularly,high performance, mechanically extensible materials and deviceconfigurations are needed exhibiting useful electronic and mechanicalproperties in stretched or contracted conformations.

SUMMARY OF THE INVENTION

The present invention provides stretchable semiconductors andstretchable electronic devices, device components and circuits. As usedherein, the term “stretchable” refers to materials, structures, devicesand device components capable of withstanding strain without fracturingor mechanical failure. Stretchable semiconductors and electronic devicesof the present invention are extensible and, thus, are capable ofstretching and/or compression, at least to some degree, without damage,mechanical failure or significant degradation in device performance.Stretchable semiconductors and electronic circuits of the presentinvention preferred for some applications are flexible, in addition tobeing stretchable, and thus are capable of significant elongation,flexing, bending or other deformation along one or more axes.

Useful stretchable semiconductors and electronic devices of the presentinvention are capable of elongation, compression, distortion and/orexpansion without mechanical failure. In addition, stretchablesemiconductor conductors and electronic circuits of the presentinvention exhibit good electronic performance even when undergoingsignificant strain, such as strain greater or equal about 0.5%,preferably 1% and more preferably 2%. Stretchable semiconductors andelectronic devices, device components and circuits that are flexiblealso exhibit good electronic performance when in flexed, bent and/ordeformed states. Stretchable semiconductor elements and stretchableelectronic devices, device components and circuits of the presentinvention are suitable for a wide range of device applications anddevice configurations as they provide useful electronic properties andmechanical ruggedness in flexed, stretched, compressed or deformeddevice orientations.

Stretchable and/or flexible semiconductors of the present invention mayalso, optionally, be printable, and may, optionally, comprise compositesemiconductor elements having a semiconductor structure operationallyconnected to other structures, materials and/or device components, suchas dielectric materials and layers, electrodes and other semiconductormaterials and layers. The present invention includes a wide range ofstretchable and/or flexible electronic and/or optoelectronic deviceshaving stretchable and/or flexible semiconductors, including but notlimited to, transistors, diodes, light emitting diodes (LEDs), organiclight emitting diodes (OLEDS), lasers, micro- and nano-electromechanicaldevices, micro- and nano-fluidic devices, memory devices, and systemslevel integrated electronic circuits, such as complementary logiccircuits.

In one aspect, the present invention provides stretchable semiconductorelements providing useful functional properties when in flexed,expanded, compressed, bent and/or deformed states. As used herein theexpression “semiconductor element” and “semiconductor structure” areused synonymously in the present description and broadly refer to anysemiconductor material, composition or structure, and expressly includeshigh quality single crystalline and polycrystalline semiconductors,semiconductor materials fabricated via high temperature processing,doped semiconductor materials, organic and inorganic semiconductors andcomposite semiconductor materials and structures having one or moreadditional semiconductor components and/or non-semiconductor components,such as dielectric layers or materials and/or conducting layers ormaterials.

A stretchable semiconductor element of the present invention comprises aflexible substrate having a supporting surface and a semiconductorstructure having a curved internal surface, for example a curvedinternal surface provided by a bent conformation of the semiconductorstructure. In this embodiment, at least a portion of the curved internalsurface of the semiconductor structure is bonded to the supportingsurface of the flexible substrate. Exemplary semiconductor structureshaving curved internal surfaces useful in present invention comprisebent structures. In the context of this description, a “bent structure”refers to a structure having a curved conformation resulting from theapplication of a force. Bent structures in the present invention mayhave one or more folded regions, convex regions and/or concave regions.Bent structures useful in the present invention, for example, may beprovided in a coiled conformation, a wrinkled conformation, a buckledconformation and/or a wavy (ie., wave-shaped) configuration.

Bent structures, such as stretchable bent semiconductor structures andelectronic circuits having curved internal surfaces, may be bonded to aflexible substrate, such as a polymer and/or elastic substrate, in aconformation wherein the bent structure is under strain. In someembodiments, the bent structure, such as a bent ribbon structure, isunder a strain equal to or less than about 30%, a strain equal to orless than about 10% in embodiments preferred for some applications, astrain equal to or less than about 5% in embodiments preferred for someapplications and a strain equal to or less than about 1% in embodimentspreferred for some applications. In some embodiments, the bentstructure, such as a bent ribbon structure, is under a strain selectedfrom the range of about 0.5% to about 30%, preferably for someapplications a strain selected from the range of about 0.5% to about10%, preferably for some applications a strain selected from the rangeof about 0.5% to about 5%.

In a useful embodiment, the semiconductor structure having a curvedinternal surface comprises a transferable semiconductor element bonded,at least partially, to the supporting flexible substrate. In the contextof this description, a “transferable semiconductor element” is asemiconductor structure that is capable of being transferred from adonor surface to a receiving surface, for example via depositiontechniques, printing techniques, patterning techniques and/or othermaterial transfer methods. Transferable semiconductor elements useful inthe present methods, compositions and devices include, but are notlimited to, printable semiconductor elements.

Useful flexible substrates include, but are not limited to, polymersubstrates, plastic substrates and/or elastic substrates. In oneembodiment, for example, the present invention comprises a transferable,and optionally printable, semiconductor element that is transferred andbonded to a prestrained elastic substrate. Useful transfer methods inthis aspect of the invention include printing techniques, such ascontact printing or solution printing. Subsequent relaxation of theelastic substrate generates a strain on the transferable, and optionallyprintable, semiconductor element resulting in formation of the curvedinternal surface, for example via bending and/or buckling of thesemiconductor element.

In some embodiments, the semiconductor element having a curved internalsurface is fabricated (as described above for example) and subsequentlytransferred from the elastic substrate used to generate its curvedsurface to a different flexible substrate, and is bonded to thedifferent flexible substrate. Useful embodiments of this aspect of thepresent invention include a transferable, and optionally printable,semiconductor structure comprising a bent semiconductor ribbon, wire,strip, discs, platelet, block, post, or cylinder with a curved internalsurface having a wrinkled, buckled and/or wave-shaped configuration. Thepresent invention includes, however, stretchable semiconductors whereinthe semiconductor element is not provided to the flexible substrate viaprinting means and/or wherein the semiconductor element is notprintable.

The present invention includes stretchable semiconductors comprising asingle semiconductor element having a curved internal surface supportedby a single flexible substrate. Alternatively, the present inventionstretchable semiconductors comprising a plurality of stretchablesemiconductor elements having curved internal surfaces supported by asingle flexible substrate. Embodiments of the present invention includean array or pattern of stretchable semiconductor elements having curvedinternal surfaces supported by a single flexible substrate. Optionally,stretchable semiconductor elements in the array or pattern have welldefined, preselected physical dimensions, positions and relative spatialorientations.

The present invention also includes stretchable electronic devices,device components and/or circuits comprising one or more stretchablesemiconductor structures, and additional integrated device components,such as electrical contacts, electrodes, conducting layers, dielectriclayers, and/or additional semiconductor layers (e.g. doped layers, P-Njunctions etc.). In this embodiment, stretchable semiconductorstructures and additional integrated device components are operationallycoupled so as to provide a selected device functionality, and may be inelectrical contact or insulated with respect to each other. In someuseful embodiments, at least a portion of, or all of, the additionalintegrated device components (and the stretchable semiconductor(s)) havecurved internal surfaces that are, optionally supported by supportingsurfaces of a flexible substrate and, are provided in a bent structure,for example a bent structure having a coiled, wave-shaped, buckledand/or wrinkled conformation. Curved internal surfaces of additionalintegrated device components and stretchable semiconductors may havesubstantially the same or different contour profiles. The presentinvention includes embodiments wherein stretchable device components areinterconnected via metal interconnects that exhibit intrinsicstretchablility or metal interconnects that also have a wave-shaped,wrinkled, bent and/or buckled conformation.

The curved internal surface configurations of additional integrateddevice components are provided in some embodiments by an overall bentstructure of the electronic device, such as a coiled, wave-shaped,buckled and/or wrinkled configuration. In these embodiments, the bentstructure enables these devices to exhibit good electronic performanceeven when undergoing significant strain, such as maintaining electricalconductivity or insulation with a semiconductor element while in astretched, compressed and/or bent configuration. Stretchable electroniccircuits may be fabricated using techniques similar to those used tofabricate stretchable semiconductor elements, as described herein. Inone embodiment, for example, stretchable device components, including astretchable semiconductor element, are fabricated independently and theninterconnected. Alternatively, a semiconductor containing device may befabricated in a planar configuration, and the resulting planar device issubsequently processed to provide an overall bent device structurehaving curved internal surfaces of some or all of the device components.

The present invention includes stretchable electronic devices comprisinga single electronic device having a curved internal surface supported bya single flexible substrate. Alternatively, the present inventionincludes stretchable electronic device arrays comprising a plurality ofstretchable electronic devices or device components, each having curvedinternal surfaces supported by a single flexible substrate. Optionally,stretchable electronic devices in devices arrays of the presentinvention have well defined, preselected physical dimensions, positionsand relative spatial orientations.

In some embodiments of the present invention the curved internal surfaceof the semiconductor structure or electronic device is provided by abent structure. Bent structures and curved internal surfaces ofsemiconductors and/or electronic devices of the present invention mayhave any contour profile providing stretchability and/or flexibilityincluding, but not limited to, contour profiles characterized by atleast one convex region, at least one concave region or a combination ofat least one convex region and at least one concave region. Contourprofiles useful in the present invention include contour profilesvarying in one or two spatial dimensions. Use of a bent structure havingan internal surface with a contour profile exhibiting periodic oraperiodic variations in more than one spatial dimension are useful forproviding stretchable semiconductors and/or electronic devices capableof stretching, compression, flexing or otherwise deformation in morethan one direction, including orthogonal directions.

Useful embodiments include curved internal surfaces provided by bentsemiconductor structures and/or electronic devices having conformationscomprising a plurality of convex and concave regions, for example analternating pattern of convex and concave regions provided in awave-shaped configuration. In an embodiment, the curved internalsurface, or optionally the entire cross sectional component, of astretchable and/or flexible semiconductor element or electronic devicehas a contour profile characterized by a substantially periodic wave or,alternatively, a substantially aperiodic wave. In the context of thisdescription, periodic waves may comprise any two or three dimensionalwave form including but not limited to, one or more sine waves, squarewaves, Aries functions, Gaussian wave forms, Lorentzian wave forms, orany combination of these. In another embodiment, the curved internalsurface, or optionally the entire cross sectional component, of asemiconductor or electronic device has a contour profile comprising aplurality of aperiodic buckles having relatively large amplitudes andwidths. In another embodiment, the curved internal surface, oroptionally the entire cross section component, of a semiconductor orelectronic device has a contour profile comprising both a periodic waveand a plurality of aperiodic buckles.

In one embodiment, a stretchable semiconductor element or electronicdevice of the present invention comprises a bent structure, such as abent ribbon structure, having a periodic or aperiodic wave-shapedconformation extending along at least a portion of its length, andoptionally width. The invention includes, for example, bent structures,including bent ribbon structures, having a sine wave conformation withperiodicities between about 500 nanometers and 100 microns, andpreferably for some applications periodicities between about 5 micronsto about 50 microns. The invention includes, for example, bentstructures, including bent ribbon structures, having a sine waveconformation with amplitudes between about 50 nanometers and about 5microns and preferably for some applications amplitudes between about100 nanometers to about 1.5 microns. Bent structures may be provided inother periodic wave form conformations such as square wave and/orGaussian waves, extending along at least a portion of the lengths and/orwidths of these structures. Stretchable and flexible semiconductorelements and stretchable electronic devices comprising bent ribbonstructures may be expandable, compressible, bendable and/or deformablealong an axis extending along the length of the semiconductor ribbon,such as an axis extending along the direction of a first wave form ofthe curved internal surface, and, optionally, may be expandable,compressible, bendable and/or deformable along one or more other axes,such as axes extending along the directions of other wave forms of thebent structures and curved internal surface.

In some embodiments, the conformation of semiconductor structures andelectronic devices of this aspect of the present invention changes whenmechanically stressed or when forces are applied. For example, theperiodicities and/or amplitudes of bent semiconductor structures andelectronic devices having wave-shaped or buckled conformations maychange in response to applied mechanical stress and/or forces. In someembodiments, this ability to change conformation provides for theability of stretchable semiconductor structures and electronic circuitsto expand, compress, flex, deform and/or bend without experiencingsignificant mechanical damage, fracture or a substantial reduction inelectronic properties and/or electronic device performance.

The curved internal surface of the semiconductor structure and/orstretchable electronic device may be continuously bonded to thesupporting surface (i.e. bound at substantially all points (e.g. about90%) along the curved internal surface). Alternatively, the curvedinternal surface of the semiconductor structure and/or stretchableelectronic device may be discontinuously bonded to the supportingsurface, wherein the curved internal surface is bonded to the supportingsurface at selected points along the curved internal surface. Thepresent invention includes embodiments wherein the internal surface ofthe semiconductor structure or electronic device is bonded to theflexible substrate at discrete points and the internal surface is in acurved conformation between the discrete points of binding between theinternal surface and the flexible substrate. The present inventionincludes bent semiconductor structures and electronic devices having aninternal surface that is bound to the flexible substrate at discretepoints, wherein the discrete points of bonding are separated from eachother by buckled regions that are not directly bound to the flexiblesubstrate.

In some stretchable semiconductors and/or stretchable electronic devicesof the present invention, only the internal surface of the semiconductorstructure or electronic device is provided in a curved conformation.Alternatively, the present invention includes stretchable semiconductorsand stretchable electronic devices provided in a bent conformationwherein an entire cross-sectional component of the bent semiconductorstructure or electronic device is provided in a curved conformation,such as a wave-shaped, wrinkled, buckled or coiled conformation. Inthese embodiments, the curved conformation extends across the entirethickness of at least a portion of the semiconductor structure orelectronic device. For example, stretchable semiconductors of thepresent invention include bent semiconductor ribbons or strips having awave-shaped, wrinkled, buckled and/or coiled configuration. The presentinvention also includes compositions and electronic devices wherein theentire semiconductor structure or electronic device, or at least themajority of the semiconductor structure or electronic device, isprovided in a curved conformation, such as a wave-shaped, wrinkled orbent conformation.

In some embodiments, the wave-shaped, buckled and/or stretchableconformation provides a way to mechanically tune useful the propertiesof compositions, materials and devices of the present invention. Forexample, the mobility of a semiconductor and the properties of itscontacts, depend, at least in part, on strain. Spatially varying strainin the present invention is useful for modulating the materials anddevice properties in useful ways. As another example, spatially varyingstrain in a waveguide causes spatially varying index properties (throughthe elasto-optic effect), which can also be used to advantage fordifferent types of grating couplers.

Bonding between the internal surface(s) of stretchable semiconductorstructures and/or electronic devices to the external surface of flexiblesubstrates may be provided using any composition, structure or bondingscheme providing a mechanically useful system capable of undergoingstretching and/or compression displacement without mechanical failure orsignificant degradation of electronic properties and/or performance, andoptionally capable of flexing displacement without mechanical failure orsignificant degradation of electronic properties and/or performance.Useful bonding between the semiconductor structure and/or electronicdevice and the flexible substrate provides mechanically robuststructures exhibiting beneficial electronic properties when in a varietyof stretched, compressed and/or flexed configurations or deformations.In one embodiment of this aspect of the present invention, bondingbetween at least a portion of the internal surface of the semiconductorstructure and/or electronic device and an external surface of theflexible substrate is provided by covalent and/or non covalent bondingbetween the semiconductor structure or electronic device and theexternal surface of the flexible substrate. Exemplary bonding schemesuseful in these structures include the use of van der Waalsinteractions, dipole-diople interactions and/or hydrogen bondinginteractions between the semiconductor structure or electronic deviceand the external surface of the flexible substrate. The presentinvention also includes embodiments wherein bonding is provided by anadhesive or laminating layer, coating or thin film provided between thesemiconductor structure or electronic device and the external surface ofthe flexible substrate. Useful adhesive layers include, but are notlimited to, metal layers, polymer layers, partial polymerized polymerprecursor layers, and composite material layers. The present inventionalso includes use of flexible substrates having a chemically modifiedexternal surface to facilitate bonding with the semiconductor element orelectronic device, for example a flexible substrate, such as a polymersubstrate, having a plurality of hydroxyl groups disposed on itsexternal surfaces. The invention includes flexible semiconductors andelectronic circuits wherein the semiconductor structure or electroniccircuit is entirely or partially encapsulated by an encapsulating layeror coating, such as a polymer layer.

The physical dimensions and composition of the semiconductor structureor electronic device at least in part influences the overall mechanicaland electronic properties of the stretchable semiconductor elements ofthe present invention. As used herein, the term thin refers to astructure having a thickness less than or equal to about 100 microns,and preferably for some applications a thickness less than or equal toabout 50 microns for some applications. Use of thin semiconductorstructures or electronic devices, such as thin semiconductor ribbons,platelets and strips or thin film transistors, is important in someembodiments for facilitating formation of a curved internal surface,such as a wave-shaped, coiled or bent curved internal surface, providinga conformation able to stretch, contract and/or flex without damage,mechanical failure or significant degradation of electronic properties.Use of thin semiconductor structures and electronic devices, such asthin printable semiconductor structures, is particularly useful forstretchable semiconductors and stretchable electronic devices comprisingbrittle semiconductor materials, such as single crystalline and/orpolycrystalline inorganic semiconductors. In a useful embodiment, thesemiconductor structure or electronic circuit has a width selected overthe range of about 1 microns to about 1 centimeter and a thicknessselected over the range of about 50 nanometers to about 50 microns.

The composition and physical dimension of the supporting flexiblesubstrate may also influence, at least in part, the overall mechanicalproperties of stretchable semiconductor elements and stretchableelectronic devices of the present invention. Useful flexible substratesincluded, but are not limited to, flexible substrates having a thicknessselected over the range of about 0.1 millimeter to about 100 microns. Ina useful embodiment, the flexible substrate comprises apoly(dimethylsiloxane) PDMS layer and has a thickness selected over therange of about 0.1 millimeters to about 10 millimeters, preferably forsome applications a thickness selected over the range of about 1millimeters to about 5 millimeters.

The present invention also includes partially-processed stretchablesemiconductor elements or partially-processed stretchable semiconductorcircuits. In one embodiment, for example, the present invention includesSi ribbons having pn-diode devices on it. The Si ribbons are provided ina wave-shaped confirmation are optionally provided on a PDMS substrate.Interconnections are provided among these (isolated) diodes so that thediode output (ex. photocurrent) is capable of being amplified, forexample via metal evaporation through shadow mask. In one embodiment, aplurality of separated stretchable transistors are fabricated onelastomer. Individual transistors are wired in some way (evaporationwith shadow mask, for instance) to produce other useful circuits, forexample circuits made of several transistors connected in specific way.For these cases, the interconnection metal wires are also stretchable,thus we have fully stretchable circuit on elastomer.

In another aspect, the present invention provides methods for making astretchable semiconductor element, comprising the steps of: (1)providing a transferable semiconductor structure having an internalsurface; (2) providing a prestrained elastic substrate in an expandedstate, wherein the elastic substrate has an external surface; (3)bonding at least a portion of the internal surface of the transferablesemiconductor structure to the external surface of the prestrainedelastic substrate in an expanded state; and (4) allowing the elasticsubstrate to at least partially relax to a relaxed state, whereinrelaxation of the elastic substrate bends the internal surface of thetransferable semiconductor structure, thereby generating the stretchablesemiconductor element having a curved internal surface. In someembodiments of this aspect of the invention, the prestrained elasticsubstrate is expanded along a first axis, and optionally along a secondaxis orthogonally positioned relative to the first axis. In a usefulembodiment, the transferable semiconductor element provided to theprestrained elastic substrate is a printable semiconductor element.

In another aspect, the present invention provides a method for making astretchable electronic circuit comprising the steps of: (1) providing atransferable electronic circuit having an internal surface; (2)providing a prestrained elastic substrate in an expanded state, whereinthe elastic substrate has an external surface; (3) bonding at least aportion of the internal surface of the transferable electronic circuitto the external surface of the prestrained elastic substrate in anexpanded state; and (4) allowing the elastic substrate to relax at leastpartially to a relaxed state, wherein relaxation of the elasticsubstrate bends the internal surface of the electronic circuit, therebymaking the stretchable electronic circuit. In a useful embodiment, thetransferable electronic circuit provided to the prestrained elasticsubstrate is a printable electronic circuit, such as an electroniccircuit that is capable of transfer via printing techniques, such as drytransfer contact printing. In some embodiments, the electronic circuitcomprises a plurality of integrated device components, including but notlimited to, one or more semiconductor elements such as transferable, andoptionally, printable semiconductor elements; dielectric elements;electrodes; conductive elements including superconductive elements; anddoped semiconductor elements.

Optionally, the methods of the aspect of the present invention mayfurther comprise the step of transferring the stretchable semiconductoror stretchable electronic circuit from the supporting elastic substrateto the receiving surface of a receiving substrate (different from theelastic substrate) in a manner which retains, at least in part, thecurved internal surface and/or bent structure of the semiconductorelement or electronic circuit. The semiconductor structure or electroniccircuit is transferred to a receiving substrate that is flexible, suchas a polymer receiving substrate, or a receiving substrate comprisingpaper, metal or a semiconductor. In this embodiment, the stretchablesemiconductor or stretchable electronic device transferred may be boundto the receiving substrate, such as a flexible, polymer receivingsubstrate, via a wide range of means including, but not limited to, useof adhesive and/or laminating layers, thin films and/or coatings, suchas adhesive layers (e.g. polyimide glue layers). Alternatively, thestretchable semiconductor or stretchable electronic device transferredmay be bound to the receiving substrate, such as a flexible, polymerreceiving substrate, via hydrogen bonding, covalent bonding,dipole-dipole interactions and van der Waals interactions between thetransferred stretchable semiconductor or stretchable electronic deviceand the receiving substrate.

In one embodiment, after making bent semiconductor structures and/orelectronic circuits having wave-shaped, buckled, wrinkled or coiledconformations supported by an elastic substrate, these structures aretransferred onto another substrate using a proper adhesive layer orcoating. In one embodiment, for example, wave-shaped photovoltaicdevices are prepared on an elastomer substrate, and then transferredonto metal foil for example using polyimide as a glue layer. Electricalconnection is established between the photovoltaic devices andunderlying metal foil (which can act as one of collector electrodes; forexample by patterning, etching to make through-holes to expose metalsurface, metal deposition, etc.). The wavy surface of the photovoltaicdevices in this configuration can be exploited for enhanced lighttrapping (or, reduced light reflection). To get better anti-reflectionresult, we can do further processing on this wavy surface, such as makesurface roughness much smaller than wavelength of wavy semiconductor,for example. In short, the partially- or fully-processed wavy/bentsemiconductors/circuits can be transferred onto other substrate (notlimited to PDMS), and can be used with more enhanced performance, byadding further processing if necessary.

Optionally, the methods of the present invention may further comprisethe step of encapsulating, encasing or laminating the stretchablesemiconductor or stretchable electronic device. In this context,encapsulating includes in the case of delaminated buckled structures,geometries and conformations wherein the encapsulating material isprovided under the raised regions of the buckles to fully embed allsides of the buckled structure. Encapsulating also includes providing anencapsulating layer, such as a polymer layer, on top of raised andnon-raised features of the bent semiconductor structure or electroniccircuit. In one embodiment, a prepolymer, such as a PDMS pre-polymer, iscast and cured on the stretchable semiconductor or stretchableelectronic device. Encapsulation or encasing processing step is usefulfor some applications to enhance the mechanical stability and robustnessof stretchable semiconductors and electronic devices of the presentinvention. The present invention includes encapsulated, encased and/orlaminated stretchable semiconductors and electronic devices exhibitinggood mechanical and electronic performance when in stretched,compressed, bent and/or flexed conformations.

Optionally, methods of this aspect of the present invention include thestep of assembling semiconductor elements, device components and/orfunctional devices on a donor substrate, such a polymer substrate (e.g.2D ultrathin polymer substrate) or an inorganic substrate (e.g. SiO₂).In this embodiment, the structures assembled on the donor substrate arethen transferred to the prestrained elastomeric substrate to formstretchable materials, devices or device components. In one embodiment,transistors, transistor arrays or electronic devices having transistorsare first assembled on a donor substrate, for example via printingtechniques using printable semiconductor elements. Next, the entiredevice and/or device array is transferred to the prestrained elasticsubstrate, for example by contact printing, to form a stretchablewave-shaped and/or buckled system. This approach is useful for caseswhere it is beneficial to prepare the device interconnects and fullscale circuit fabrication on a thin, non-elastomeric material (likepolyimide or benzocyclobutene or PET, etc.) before transferring to thestretchable elastomeric support. In this type of system, one would yieldaperiodic 2D wave-shaped or buckled structures in the combinedtransistor/polymer film/elastomer substrate system.

Methods of prestraining elastic substrates useful for the presentmethods include bending, rolling, flexing, and expanding the elasticsubstrate prior to and/or during contact and bonding with thesemiconductor structure and/or electronic device, for example by using amechanical stage. A particularly useful means of prestraining theelastic substrates in more than one direction comprises thermallyexpanding the elastic substrate by raising the temperature of theelastic substrate prior and/or during contact and bonding with thesemiconductor structure and/or electronic device. Relaxation of theelastic substrate is achieved in these embodiments by lowering thetemperature of the elastic substrate after contact and/or bonding withthe transferable, and optionally printable, printable semiconductorelement or electronic device. In some methods, the elastic substrate isprestrained by introducing a strain of about 1% to about 30%, andpreferably for some applications by introducing a strain of about 3% toabout 15%.

In the context of this description, the expression “elastic substrate”refers to a substrate which can be stretched or deformed and return, atleast partially, to its original shape without substantial permanentdeformation. Elastic substrates commonly undergo substantially elasticdeformations. Exemplary elastic substrates useful in the presentinclude, but are not limited to, elastomers and composite materials ormixtures of elastomers, and polymers and copolymers exhibitingelasticity. In some methods, the elastic substrate is prestrained via amechanism providing for expansion of the elastic substrate along one ormore principle axes. For example, prestraining may be provided byexpanding the elastic substrate along a first axes. The presentinvention also includes, however, methods wherein the elastic substrateis expanded along a plurality of axes, for example via expansion alongfirst and second axis orthogonally positioned relative to each other.Means of prestraining elastic substrates via mechanisms providingexpansion of the elastic substrate useful for the present methodsinclude bending, rolling, flexing, flattening, expanding or otherwisedeforming the elastic substrate. The present invention also includesmeans wherein prestraining is provided by raising the temperature of theelastic substrate, thereby providing for thermal expansion of theelastic substrate.

The methods of the present invention are also capable of fabricatingstretchable elements, devices and device components from materials otherthan semiconductor materials. The present invention includes methodswherein non-semiconductor structures, such as insulators, superconductors, and semi-metals are transferred to and bonded to a prestrainelastic substrate. Allowing the elastic substrate to relax, at leastpartially, results in formation of stretchable non-semiconductorstructures having curved internal surfaces, for examplenon-semiconductor structures having a wave-shaped and/or buckled contourprofile. This aspect of the present invention includes stretchablenon-semiconductor structures that have a bent structure, such asinternal, and optionally external, surfaces provided in a coiledconformation, in a wrinkled conformation, buckled conformation and/or ina wave-shaped configuration.

Flexible substrates useful in stretchable semiconductors, electronicdevices and/or device components of the present invention include, butare not limited to, polymer substrates and/or plastic substrates.Stretchable semiconductors include compositions comprising one or moretransferable, an optionally printable, semiconductor structures, such asprintable semiconductor elements, supported by an elastic substrate thatis prestrained during fabrication to generate the curved internalsemiconductor surface. Alternatively, stretchable semiconductors includecompositions comprising one or more transferable semiconductorstructures, such as printable semiconductor elements, supported by aflexible substrate that is different than the elastic substrate that isprestrained during fabrication to generate the curved internalsemiconductor surface. For example, the present invention includesstretchable semiconductors wherein the semiconductor structure having acurved internal surface is transferred from the elastic substrate to adifferent flexible substrate.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 provides an atomic force micrograph showing a stretchablesemiconductor structure of the present invention.

FIG. 2 shows an atomic force micrograph providing an expanded view of asemiconductor structure having curved internal surface.

FIG. 3 shows an atomic force micrographs of an array of stretchablesemiconductor structures of the present invention.

FIG. 4 shows optical micrographs of stretchable semiconductor structuresof the present invention.

FIG. 5 shows an atomic force micrograph of a stretchable semiconductorstructure of the present invention having a semiconductor structurebonded to a flexible substrate having a three dimensional relief patternon its supporting surface.

FIG. 6 shows a flow diagram illustrating an exemplary method of making astretchable semiconductor element of the present invention.

FIG. 7 shows an image of an array of longitudinal aligned stretchablesemiconductors structures having wave-shaped curved internal surfacessupported by a flexible rubber substrate.

FIG. 8 shows a cross sectional image of a stretchable semiconductorstructure of the present invention, wherein printable semiconductorstructures 776 are supported by flexible substrate 777. As shown in FIG.8, printable semiconductor structures 776 have internal surfaces havinga contour profile of a periodic wave.

FIG. 9A shows a process flow diagram illustrating an exemplary method ofmaking an array of stretchable thin film transistors. FIG. 9B showsoptical micrographs of an array of stretchable thin film transistors inrelaxed and stretched configurations.

FIG. 10: Schematic illustration of the process for building stretchablesingle crystal silicon devices on elastomeric substrates. The first step(top frame) involves fabrication of thin (thicknesses between 20 and 320nm) elements of single crystal silicon or complete integrated devices(i.e. transistors, diodes, etc.) by conventional lithographic processingfollowed by etching of the top silicon and SiO₂ layers of asilicon-on-insulator (SOI) wafer. After these procedures, the ribbonstructures are supported by but not bonded to the underlying wafer (topframe). Contacting a prestrained elastomeric substrate(poly(dimethylsiloxane) PDMS—stretched by dL) to the ribbons leads tobonding between these materials (middle frame). Peeling back the PDMS,with the ribbons bonded on its surface, and then releasing the prestraincauses the PDMS to relax back to its unstrained state (unstressedlength, L). This relaxation leads to the spontaneous formation of wellcontrolled, highly periodic, stretchable ‘wave-shaped’ structures in theribbons (bottom frame).

FIG. 11: (A) Optical images of a large scale aligned array of wavysingle crystal silicon ribbons (widths=20 μm; spacings=20 μm;thicknesses=100 nm) on PDMS. (B) Angled view scanning electronmicrograph of four wavy silicon ribbons from the array shown in (A). Thewavelengths and amplitudes of the wave structures are highly uniformacross the array. (C) Surface height (top frame) and wavenumber of theSi Raman peak (bottom frame) as a function of position along a wavy Siribbon on PDMS, measured by atomic force and Raman microscopy,respectively. The lines represent sinusoidal fits to the data. (D)Amplitudes (top frame) and wavelengths (bottom frame) of wavy siliconribbons as a function of the thickness of the silicon, all for a givenlevel of prestrain in the PDMS. The lines correspond to calculations,without any fitting parameters.

FIG. 12: Buckling wavelength as a function of temperature. The slightdecrease in wavelength with increasing temperature is due to thermalshrinkage of the PDMS, which leads to shorter wavelengths for samplesprepared at higher temperatures.

FIG. 13: Peak silicon strain as a function of silicon thickness, for aprestrain value of ˜0.9%. The red symbols correspond to bending strainscomputed using wavelengths and amplitudes extracted based on equationsthat describe the buckling process. The black symbols correspond tosimilar calculations but using wavelengths and amplitudes measured byAFM.

FIG. 14: (A) Atomic force micrographs (AFM; left frames) and reliefprofiles (right frames; the lines are the sinusoidal fit to experimentaldata) of wavy single crystal silicon ribbons (width=20 μm; thickness=100nm) on PDMS substrates. The top, middle, and bottom parts correspond toconfigurations when the PDMS is strained, along the ribbon lengths, by−7%(compression), 0%(unperturbed) and 4.7%(stretching), respectively.(B) Average amplitudes (black) and changes in wavelength (red) of wavysilicon ribbons as a function of strain applied to the PDMS substrate(top frame). For the wavelength measurements, different substrates areused for tension (circles) and compression (squares). Peak siliconstrains as a function of applied strain (bottom frame). The lines inthese graphs represent calculations, without any free fittingparameters.

FIG. 15: Top view AFM image of wavy silicon ribbons on PDMS, and linecut evaluated at an angle relative to the long dimension of the ribbons.

FIG. 16: Silicon ribbon strain as a function of applied strain. The redsymbols correspond to strains computed by numerical integration of thecontour length, using wavelengths and amplitudes extracted usingequations that describe the buckling process. The black symbolscorrespond to strains measured from the ratio of surface to horizontaldistance in AFM surface profile along the wavy Si ribbons.

FIG. 17: (A) Optical images of a stretchable single crystal silicon pndiode on a PDMS substrate at −11% (top), 0% (middle) and 11% (bottom)applied strains. The aluminum regions correspond to thin (20 nm) Alelectrodes; the pink and green regions correspond to n (boron) and p(phosphorous) doped areas of the silicon. (B) Current density as afunction of bias voltage for stretchable silicon pn diodes, measured atvarious levels of applied strain. The curves labeled ‘light’ and ‘dark’correspond to devices exposed to or shielded from ambient light,respectively. The solid curves show modeling results. (C)Current-voltage characteristics of a stretchable Schottky barriersilicon MOSFET, measured at −9.9%, 0% and 9.9% applied strains (The gatevoltage varies from 0V to −5V with a 1V step).

FIG. 18: Peak silicon strain as a function of applied strain. The blueline is based on an accordion bellows model, and the black is anapproximation for small strain which is also consistent with bucklingmechanics.

FIG. 19: Electrical measurements of wavy pn diodes, evaluated in threedifferent devices before (before cycle) and after (after cycle) ˜100cycles of compressing (to ˜5% applied strain), stretching (to ˜15%applied strain) and releasing for three different devices (#1, #2 and#3). The data indicate no systematic changes in device properties. Thelevel of observed variation is comparable to that associated withrepeated probing of a single device without changing the applied strain,and is likely due to slight differences in probe contacts.

FIG. 20: Optical images (top frames) of a wavy silicon Schottky barrierMOSFET in its unperturbed state (middle) and in compression (top) andtension (bottom). Schematic illustration (bottom frame) of the device.

FIG. 21: Transfer curves measured in a ‘wavy’ silicon Schottky barrierMOSFET at different applied strains.

FIG. 22: Schematic illustration of steps for generating ‘buckled’ and‘wavy’ GaAs ribbons on PDMS substrates. The left bottom frame shows thedeposition of thin SiO₂ on the surfaces of the ribbons to promote strongbonding to the PDMS. This bonding leads to the formation of the wavygeometry shown in the right middle frame. Weak, van der Waals bonding(and moderate to high levels of prestrain) leads to the buckledgeometry, as shown in the right top frame.

FIG. 23: Images of wavy GaAs ribbons on a PDMS substrate, as formed witha prestrain of ˜1.9% generated through thermal expansion. Optical (A),SEM (B), three-dimensional AFM (C) and top-view AFM (D) images of thesame sample. The SEM image is obtained by tilting the sample stage atthe angle of 45° between sample surface and detection direction. (Spotson the ribbons might be residues from the sacrificial AlAs layers.) (E,F) Surface height profiles plotted along the lines in blue and green asshown in (D), respectively.

FIG. 24: (A) Optical micrographs of wavy GaAs ribbons formed with aprestrain of 7.8%, strongly bonded to the PDMS, collected at differentapplied strains. The blue bars on the left and right highlight certainpeaks in the structure; the variation in the distance between these barsindicate the dependence of the wavelength on applied strain. (B) Changein wavelength as a function of applied strain for the wavy GaAs ribbonsshown in (A), plotted in black; similar data for a system of sample (A)after embedding in PDMS, plotted in red.

FIG. 25: Images of GaAs ribbons integrated with ohmic (source and drain)and Schottky (gate) contacts to form complete MESFETs. (A) Opticalmicrographs of wavy ribbons formed using a prestrain of 1.9% and strongbonding to the PDMS, showing the formation of periodic waves only in thesections without electrodes (grey). (B) Optical and (C) SEM images ofbuckled ribbons formed with a prestrain of ˜7% and weak bonding to thePDMS. (D) Optical image of two buckled devices shown in (B) after theywere stretched to be flat. (E) A set of optical images of an individualribbon device shown in (B) with different external applied strains(i.e., compressing strain of 5.83%, no applied strain, and stretchingstrain of 5.83% from top to bottom) after it was embedded in PDMS.

FIG. 26: (A) Optical images of a GaAs ribbon MESFET on a PDMS stamp withdifferent strains built in the PDMS substrate. The prestrain applied tothe PDMS stamp was 4.7% before the devices were transferred onto itssurface. (B) Comparison of I-V curves for the device shown in (A) beforeand after the system was applied 4.7% stretching strain.

FIGS. 27A-C provides images at different degrees of magnification of astretchable semiconductor of the present invention exhibitingstretchability in two dimensions.

FIGS. 28A-C provide images of three different structural conformationsof stretchable semiconductors of the present invention exhibitingstretchability in two dimensions.

FIGS. 29A-D provide images of stretchable semiconductors of the presentinvention prepared by prestraining the elastic substrate via thermalexpansion.

FIG. 30 shows optical images of stretchable semiconductors exhibitingstretchability in two dimensions under varying stretching andcompression conditions.

FIG. 31A shows an optical image of stretchable semiconductors exhibitingstretchability in two dimensions fabricated via prestraining an elasticsubstrate via thermal expansion. FIGS. 31B and 31C provide experimentalresults relating to the mechanical properties of the stretchablesemiconductors shown in FIG. 31A.

DETAILED DESCRIPTION OF THE INVENTION

Referring to the drawings, like numerals indicate like elements and thesame number appearing in more than one drawing refers to the sameelement. In addition, hereinafter, the following definitions apply:

“Printable” relates to materials, structures, device components and/orintegrated functional devices that are capable of transfer, assembly,patterning, organizing and/or integrating onto or into substrates. Inone embodiment of the present invention, printable materials, elements,device components and devices are capable of transfer, assembly,patterning, organizing and/or integrating onto or into substrates viasolution printing or dry transfer contact printing.

“Printable semiconductor elements” of the present invention comprisesemiconductor structures that are able to be assembled and/or integratedonto substrate surfaces, for example using by dry transfer contactprinting and/or solution printing methods. In one embodiment, printablesemiconductor elements of the present invention are unitary singlecrystalline, polycrystalline or microcrystalline inorganic semiconductorstructures. In this context of this description, a unitary structure isa monolithic element having features that are mechanically connected.Semiconductor elements of the present invention may be undoped or doped,may have a selected spatial distribution of dopants and may be dopedwith a plurality of different dopant materials, including P and N typedopants. The present invention includes microstructured printablesemiconductor elements having at least one cross sectional dimensiongreater than or equal to about 1 micron and nanostructured printablesemiconductor elements having at least one cross sectional dimensionless than or equal to about 1 micron. Printable semiconductor elementsuseful in many applications comprises elements derived from “top down”processing of high purity bulk materials, such as high puritycrystalline semiconductor wafers generated using conventional hightemperature processing techniques. In one embodiment, printablesemiconductor elements of the present invention comprise compositestructures having a semiconductor operational connected to at least oneadditional device component or structure, such as a conducting layer,dielectric layer, electrode, additional semiconductor structure or anycombination of these. In one embodiment, printable semiconductorelements of the present invention comprise stretchable semiconductorelements and/or heterogeneous semiconductor elements.

“Cross sectional dimension” refers to the dimensions of a cross sectionof device, device component or material. Cross sectional dimensionsinclude width, thickness, radius, and diameter. For example,semiconductor elements having a ribbon shape are characterized by alength and two cross sectional dimensions; thickness and width. Forexample, printable semiconductor elements having a cylindrical shape arecharacterized by a length and the cross sectional dimension diameter(alternatively radius).

“Supported by a substrate” refers to a structure that is present atleast partially on a substrate surface or present at least partially onone or more intermediate structures positioned between the structure andthe substrate surface. The term “supported by a substrate” may alsorefer to structures partially or fully embedded in a substrate.

“Solution printing” is intended to refer to processes whereby one ormore structures, such as printable semiconductor elements, are dispersedinto a carrier medium and delivered in a concerted manner to selectedregions of a substrate surface. In an exemplary solution printingmethod, delivery of structures to selected regions of a substratesurface is achieved by methods that are independent of the morphologyand/or physical characteristics of the substrate surface undergoingpatterning. Solution printing methods useable in the present inventioninclude, but are not limited to, ink jet printing, thermal transferprinting, and capillary action printing.

“Substantially longitudinally oriented” refers to an orientation suchthat the longitudinal axes of a population of elements, such asprintable semiconductor elements, are oriented substantially parallel toa selected alignment axis. In the context of this definition,substantially parallel to a selected axis refers to an orientationwithin 10 degrees of an absolutely parallel orientation, more preferablywithin 5 degrees of an absolutely parallel orientation.

“Stretchable” refers to the ability of a material, structure, device ordevice component to be strained without undergoing fracture. In anexemplary embodiment, a stretchable material, structure, device ordevice component may undergo strain larger than about 0.5% withoutfracturing, preferably for some applications strain larger than about 1%without fracturing and more preferably for some applications strainlarger than about 3% without fracturing.

The terms “flexible” and “bendable” are used synonymously in the presentdescription and refer to the ability of a material, structure, device ordevice component to be deformed into a curved shape without undergoing atransformation that introduces significant strain, such as straincharacterizing the failure point of a material, structure, device ordevice component. In an exemplary embodiment, a flexible material,structure, device or device component may be deformed into a curvedshape without introducing strain larger than or equal to about 5%,preferably for some applications larger than or equal to about 1%, andmore preferably for some applications larger than or equal to about0.5%.

The term “buckle” refers to a physical deformation that occurs when athin element, structure and/or device responds to a compressive strainby bending in a direction out of the plane of the element, structureand/or device. The present invention includes stretchablesemiconductors, devices and components having one or more surfaces witha contour profile comprising one or more buckles.

“Semiconductor” refers to any material that is a material that is aninsulator at a very low temperature, but which has a appreciableelectrical conductivity at a temperatures of about 300 Kelvin. In thepresent description, use of the term semiconductor is intended to beconsistent with use of this term in the art of microelectronics andelectronic devices. Semiconductors useful in the present invention maycomprise element semiconductors, such as silicon, germanium and diamond,and compound semiconductors, such as group IV compound semiconductorssuch as SiC and SiGe, group III-V semiconductors such as AlSb, AlAs,Aln, AlP, BN, GaSb, GaAs, GaN, GaP, InSb, InAs, InN, and InP, groupIII-V ternary semiconductors alloys such as Al_(x)Ga_(1-x)As, groupII-VI semiconductors such as CsSe, CdS, CdTe, ZnO, ZnSe, ZnS, and ZnTe,group I-VII semiconductors CuCl, group IV-VI semiconductors such as PbS,PbTe and SnS, layer semiconductors such as PbI₂, MoS₂ and GaSe, oxidesemiconductors such as CuO and Cu₂O. The term semiconductor includesintrinsic semiconductors and extrinsic semiconductors that are dopedwith one or more selected materials, including semiconductor havingp-type doping materials and n-type doping materials, to providebeneficial electronic properties useful for a given application ordevice. The term semiconductor includes composite materials comprising amixture of semiconductors and/or dopants. Specific semiconductormaterials useful for in some applications of the present inventioninclude, but are not limited to, Si, Ge, SiC, AlP, AlAs, AlSb, GaN, GaP,GaAs, GaSb, InP, InAs, GaSb, InP, InAs, InSb, ZnO, ZnSe, ZnTe, CdS,CdSe, ZnSe, ZnTe, CdS, CdSe, CdTe, HgS, PbS, PbSe, PbTe, AlGaAs, AlInAs,AlInP, GaAsP, GaInAs, GaInP, AlGaAsSb, AlGaInP, and GaInAsP. Poroussilicon semiconductor materials are useful for applications of thepresent invention in the field of sensors and light emitting materials,such as light emitting diodes (LEDs) and solid state lasers. Impuritiesof semiconductor materials are atoms, elements, ions and/or moleculesother than the semiconductor material(s) themselves or any dopantsprovided to the semiconductor material. Impurities are undesirablematerials present in semiconductor materials which may negatively impactthe electronic properties of semiconductor materials, and include butare not limited to oxygen, carbon, and metals including heavy metals.Heavy metal impurities include, but are not limited to, the group ofelements between copper and lead on the periodic table, calcium, sodium,and all ions, compounds and/or complexes thereof.

“Plastic” refers to any synthetic or naturally occurring material orcombination of materials that can be molded or shaped, generally whenheated, and hardened into a desired shape. Exemplary plastics useful inthe devices and methods of the present invention include, but are notlimited to, polymers, resins and cellulose derivatives. In the presentdescription, the term plastic is intended to include composite plasticmaterials comprising one or more plastics with one or more additives,such as structural enhancers, fillers, fibers, plasticizers, stabilizersor additives which may provide desired chemical or physical properties.

“Dielectric” and “dielectric material” are used synonymously in thepresent description and refer to a substance that is highly resistant toflow of electric current. Useful dielectric materials include, but arenot limited to, SiO₂, Ta₂O₅, TiO₂, ZrO₂, Y₂O₃, SiN₄, STO, BST, PLZT,PMN, and PZT.

“Polymer” refers to a molecule comprising a plurality of repeatingchemical groups, typically referred to as monomers. Polymers are oftencharacterized by high molecular masses. Polymers useable in the presentinvention may be organic polymers or inorganic polymers and may be inamorphous, semi-amorphous, crystalline or partially crystalline states.Polymers may comprise monomers having the same chemical composition ormay comprise a plurality of monomers having different chemicalcompositions, such as a copolymer. Cross linked polymers having linkedmonomer chains are particularly useful for some applications of thepresent invention. Polymers useable in the methods, devices and devicecomponents of the present invention include, but are not limited to,plastics, elastomers, thermoplastic elastomers, elastoplastics,thermostats, thermoplastics and acrylates. Exemplary polymers include,but are not limited to, acetal polymers, biodegradable polymers,cellulosic polymers, fluoropolymers, nylons, polyacrylonitrile polymers,polyamide-imide polymers, polyimides, polyarylates, polybenzimidazole,polybutylene, polycarbonate, polyesters, polyetherimide, polyethylene,polyethylene copolymers and modified polyethylenes, polyketones,poly(methyl methacrylate, polymethylpentene, polyphenylene oxides andpolyphenylene sulfides, polyphthalamide, polypropylene, polyurethanes,styrenic resins, sulphone based resins, vinyl-based resins or anycombinations of these.

“Elastomer” refers to a polymeric material which can be stretched ordeformed and return to its original shape without substantial permanentdeformation. Elastomers commonly undergo substantially elasticdeformations. Elastic substrates useful in the present inventioncomprise, at least in part, one or more elastomers. Exemplary elastomersuseful in the present invention may comprise, polymers, copolymers,composite materials or mixtures of polymers and copolymers. Elastomericlayer refers to a layer comprising at least one elastomer. Elastomericlayers may also include dopants and other non-elastomeric materials.Elastomers useful in the present invention may include, but are notlimited to, thermoplastic elastomers, styrenic materials, olefenicmaterials, polyolefin, polyurethane thermoplastic elastomers,polyamides, synthetic rubbers, PDMS, polybutadiene, polyisobutylene,poly(styrene-butadiene-styrene), polyurethanes, polychloroprene andsilicones.

“Good electronic performance” and “high performance” are usedsynonymously in the present description and refer to devices and devicecomponents have electronic characteristics, such as field effectmobilities, threshold voltages and on-off ratios, providing a desiredfunctionality, such as electronic signal switching and/or amplification.Exemplary transferable, and optionally printable, semiconductor elementsof the present invention exhibiting good electronic performance may haveintrinsic field effect mobilities greater than or equal 100 cm² V⁻¹ s⁻¹,preferably for some applications greater than or equal to about 300 cm²V⁻¹ s⁻¹. Exemplary transistors of the present invention exhibiting goodelectronic performance may have device field effect mobilities greatthan or equal to about 100 cm² V⁻¹ s⁻¹, preferably for some applicationsgreater than or equal to about 300 cm² V⁻¹ s⁻¹, and more preferably forsome applications greater than or equal to about 800 cm² V⁻¹ s⁻¹.Exemplary transistors of the present invention exhibiting goodelectronic performance may have threshold voltages less than about 5volts and/or on-off ratios greater than about 1×10⁴.

“Large area” refers to an area, such as the area of a receiving surfaceof a substrate used for device fabrication, greater than or equal toabout 36 inches squared.

“Device field effect mobility” refers to the field effect mobility of anelectronic device, such as a transistor, as computed using outputcurrent data corresponding to the electronic device.

“Young's modulus” is a mechanical property of a material, device orlayer which refers to the ratio of stress to strain for a givensubstance. Young's modulus may be provided by the expression;

$\begin{matrix}{{E = {\frac{({stress})}{({strain})} = \left( {\frac{L_{0}}{\Delta\; L} \times \frac{F}{A}} \right)}};} & ({II})\end{matrix}$wherein E is Young's modulus, L₀ is the equilibrium length, ΔL is thelength change under the applied stress, F is the force applied and A isthe area over which the force is applied. Young's modulus may also beexpressed in terms of Lame constants via the equation:

$\begin{matrix}{{E = \frac{\mu\left( {{3\;\lambda} + {2\;\mu}} \right)}{\lambda + \mu}};} & ({III})\end{matrix}$wherein λ and μ are Lame constants. High Young's modulus (or “highmodulus”) and low Young's modulus (or “low modulus”) are relativedescriptors of the magnitude of Young's modulus in a give material,layer or device. In the present invention, a High Young's modulus islarger than a low Young's modulus, preferably about 10 times larger forsome applications, more preferably about 100 times larger for otherapplications and even more preferably about 1000 times larger for yetother applications.

In the following description, numerous specific details of the devices,device components and methods of the present invention are set forth inorder to provide a thorough explanation of the precise nature of theinvention. It will be apparent, however, to those of skill in the artthat the invention can be practiced without these specific details.

The present invention provides stretchable semiconductors and electroniccircuits capable of providing good performance when stretched,compressed flexed or otherwise deformed. Further, stretchablesemiconductors and electronic circuits of the present invention may beadapted to a wide range of device configurations to provide fullyflexible electronic and optoelectronic devices.

FIG. 1 provides an atomic force micrograph showing a stretchablesemiconductor structure of the present invention. The stretchablesemiconductor element 700 comprises a flexible substrate 705, such as apolymer and/or elastic substrate, having a supporting surface 710 and abent semiconductor structure 715 having a curved internal surface 720.In this embodiment, at least a portion of the curved internal surface720 of bent semiconductor structure 715 is bonded to the supportingsurface 710 of the flexible substrate 705. The curved internal surface720 may be bonded supporting surface 710 at selected points alonginternal surface 720 or at substantially all points along internalsurface 720. The exemplary semiconductor structure illustrated in FIG. 1comprises a bent ribbon of single crystalline silicon having a widthequal to about 100 microns and a thickness equal to about 100nanometers. The flexible substrate illustrated in FIG. 1 is a PDMSsubstrate having a thickness of about 1 millimeter. Curved internalsurface 720 has a bent structure comprising a substantially periodicwave extending along the length of the ribbon. As shown in FIG. 1, theamplitude of the wave is about 500 nanometers and the peak spacing isapproximately 20 microns. FIG. 2 shows an atomic force micrographproviding an expanded view of a bent semiconductor structure 715 havingcurved internal surface 720. FIG. 3 shows an atomic force micrograph ofan array of stretchable semiconductor structures of the presentinvention. Analysis of the atomic force micrograph in FIG. 3 shows thatthe bent semiconductor structures are compressed by about 0.27%. FIG. 4shows optical micrographs of stretchable semiconductor structures of thepresent invention.

The contour profile of curved surface 720 allows the bent semiconductorstructure 715 to be expanded or compressed along deformation axis 730without undergoing substantial mechanical strain. This contour profilemay also allow the semiconductor structure to be bent, flexed ordeformed in directions other than along deformation axis 730 withoutsignificant mechanical damage or loss of performance induced by strain.Curved surfaces of semiconductor structures of the present invention mayhave any contour profile providing good mechanical properties, such asstretchabilty, flexibility and/or bendability, and/or good electronicperformance, such as exhibiting good field effect mobilities whenflexed, stretched or deformed. Exemplary contour profiles may becharacterized by a plurality of convex and/or concave regions, and by awide variety of wave forms including sine waves, Gaussian waves, Ariesfunctions, square waves, Lorentzian waves, periodic waves, aperiodicwaves or any combinations of these. Wave forms useable in the presentinvention may vary with respect to two or three physical dimensions.

FIG. 5 shows an atomic force micrograph of a stretchable semiconductorstructure of the present invention having a bent semiconductor structure715 bonded to a flexible substrate 705 having a three dimensional reliefpattern on its supporting surface 710. The three-dimensional reliefpattern comprises recessed region 750 and relief features 760. As shownin FIG. 5, bent semiconductor structure 715 is bound to supportingsurface 710 in recessed region 750 and on relief features 760.

FIG. 6 shows a flow diagram illustrating an exemplary method of making astretchable semiconductor structure of the present invention. In theexemplary method, a prestrained elastic substrate in an expanded stateis provided. Prestraining can be achieved by any means known in the artincluding, but not limited to, roll pressing and/or prebending theelastic substrate. Prestraining may also be achieved via thermal means,for example, by thermal expansion induced by raising the temperature ofthe elastic substrate. An advantage of prestraining via thermal means isthat expansion along a plurality of different axes, such as orthogonalaxes, is achievable.

An exemplary elastic substrate useable in this method of the presentinvention is a PDMS substrate having a thickness equal to about 1millimeter. The elastic substrate may be prestrained by expansion alonga single axis or by expansion along a plurality of axes. As shown inFIG. 6, at least a portion of the internal surface of a printablesemiconductor element is bonded to the external surface of theprestrained elastic substrate in an expanded state. Bonding may beachieved by covalent bonding between the internal surface of thesemiconductor surface, by van der Waals forces, by using adhesive or anycombinations of these. In an exemplary embodiment wherein the elasticsubstrate is PDMS, the supporting surface of the PDMS substrate ischemically modified such that is has a plurality of hydroxyl groupsextending from its surface to facilitate covalent bonding with a siliconsemiconductor structure. Referring back to FIG. 6, after binding theprestrained elastic substrate and semiconductor structure, the elasticsubstrate is allowed to relax at least partially to a relaxed state. Inthis embodiment, relaxation of the elastic substrate bends the internalsurface of said semiconductor structure, thereby generating asemiconductor element having a curved internal surface.

As shown in FIG. 6, the fabrication method may optionally include asecond transfer step and, optional bonding step, wherein thetransferable semiconductor element 715 having a curved internal surface720 is transferred from the elastic substrate to another substrate,preferably a flexible substrate, such as a polymer substrate. Thissecond transfer step may be achieved by bringing an exposed surface ofthe semiconductor structure 715 having a curved internal surface 720 incontact with a receiving surface of the other substrate that binds tothe exposed surface of the semiconductor structure 715. Bonding to theother substrate may be accomplished by any means capable of maintaining,at least partially, the bent structure of the semiconductor element,including covalent bonds, bonding via van der Waals forces,dipole-dipole interactions, London forces and/or hydrogen bonding. Thepresent invention also includes the use of adhesives layers, coatingsand/or thin films provided between an exposed surface of thetransferable semiconductor structure and the receiving surface.

Stretchable semiconductor elements of the present invention may beeffectively integrated into a large number functional devices and devicecomponents, such as transistors, diodes, lasers, MEMS, NEMS, LEDS andOLEDS. Stretchable semiconductor elements of the present invention havecertain functional advantages over conventional rigid inorganicsemiconductors. First, stretchable semiconductor elements may beflexible, and thus, less susceptible to structural damage induced byflexing, bending and/or deformation than conventional rigid inorganicsemiconductors. Second, as a bent semiconductor structure may be in aslightly mechanically strained state to provide a curved internalsurface, stretchable semiconductor elements of the present invention mayexhibit higher intrinsic field effect mobilities than conventionalunstrained inorganic semiconductors. Finally, stretchable semiconductorelements are likely to provide good thermal properties because they arecapable of expanding and contracting freely upon device temperaturecycling.

FIG. 7 shows an image of an array of longitudinal aligned stretchablesemiconductors having a wavy conformation As shown in FIG. 7, thesemiconductor ribbons are provided in a periodic wave conformation andare supported by a single flexible rubber substrate.

FIG. 8 shows a cross sectional image of a stretchable semiconductorelement of the present invention, wherein semiconductor structures 776are supported by flexible substrate 777. As shown in FIG. 8,semiconductor structures 776 have internal surfaces having a contourprofile of a periodic wave. As also shown in FIG. 8, the periodic waveconformation extends through the entire cross sectional dimension of thesemiconductor structures 776.

The present invention also provides stretchable electronic circuits,devices and device arrays capable of good performance when stretched,flexed or deformed. Similar to the stretchable semiconductor elementsdescribed above, the present invention provides stretchable circuits andelectronic devices comprising a flexible substrate having a supportingsurface in contact with a device, device array or circuit having acurved internal surface, such as a curved internal surface exhibiting awave structure. In this structural arrangement, at least a portion ofthe curved internal surface of the device, device array or circuitstructure is bonded to the supporting surface of the flexible substrate.The device, device array or circuit of this aspect of the presentinvention is a multicomponent element comprising a plurality ofintegrated device components, such as semiconductors, dielectrics,electrodes, doped semiconductors and conductors. In an exemplaryembodiment, flexible circuits, devices and device arrays having a netthickness less than about 10 microns comprise a plurality of integrateddevice components at least a portion of which have a periodic wavecurved structure.

In a useful embodiment of the present invention, a free standingelectronic circuit or device comprising a plurality of interconnectedcomponents is provided. An internal surface of the electronic circuit ordevice is contacted and at least partially bonded to a prestrainedelastic substrate in an expanded state. Prestraining can be achieved byany means known in the art including, but not limited to, roll pressingand/or prebending the elastic substrate, and the elastic substrate maybe prestrained by expansion along a single axis or by expansion along aplurality of axes. Bonding may be achieved directly by covalent bondingor van der Waals forces between at least a portion of the internalsurface of the electronic circuit or device and the prestrained elasticsubstrate, or by using adhesive or an intermediate bonding layer. Afterbinding the prestrained elastic substrate and the electronic circuit ordevice, the elastic substrate is allowed to relax at least partially toa relaxed state, which bends the internal surface of the semiconductorstructure. Bending of the internal surface of the electronic circuit ordevice generates a curved internal surface which in some usefulembodiments has a periodic or aperiodic wave configuration. The presentinvention includes embodiments wherein all the components comprising theelectronic device or circuit are present in a periodic or aperiodic waveconfiguration.

Periodic or aperiodic wave configurations of stretchable electroniccircuits, devices and device arrays allow them to conform to stretch orbent configurations without generating large strains on individualcomponents of the circuits or devices. This aspect of the presentinvention provides useful electronic behavior of stretchable electroniccircuits, devices and device arrays when present in bent, stretched ordeformed states. The period of periodic wave configurations formed bythe present methods may vary with (i) the net thickness of thecollection of integrated components comprising the circuit or device and(ii) the mechanical properties, such as Young's modulus and flexuralrigidity, of the materials comprising integrated device components.

FIG. 9A shows a process flow diagram illustrating an exemplary method ofmaking an array of stretchable thin film transistors. As shown in FIG.9A, an array of free standing printable thin film transistors isprovided using the techniques of the present invention. The array ofthin film transistors is transferred to a PDMS substrate via drytransfer contact printing methods in a manner which exposes internalsurfaces of the transistors. The exposed internal surfaces are nextcontacted with a room temperature cured prestrained PDMS layer presentin an expanded state. Subsequent full curing of the prestrained PDMSlayer bonds the internal surfaces of the transistors to the prestrainedPDMS layer. The prestrained PDMS layer is allowed to cool and assume anat least partially relaxed state. Relaxation of PDMS layers introduces aperiodic wave structure to the transistors in the array, thereby makingthem stretchable. The inset in FIG. 9A provides an atomic forcemicrograph of a array of stretchable thin film transistors made by thepresent methods. The atomic force micrograph shows the periodic wavestructure that provides for good electronic performance in stretched ordeformed states.

FIG. 9B shows provides optical micrographs of an array of stretchablethin film transistors in relaxed and stretched configurations.Stretching the array in a manner generating a net strain of about 20% onthe array did not fracture or damage the thin film transistors. Thetransition from a relax configuration to a strain configuration wasobserved to be a reversible process. FIG. 9B also provides a plot ofdrain current verse drain voltage for several potentials applied to thegate electrode showing that the stretchable thin film transistorsexhibit good performance in both relaxed and stretched configurations.

EXAMPLE 1 A Stretchable Form of Single Crystal Silicon for HighPerformance Electronics on Rubber Substrates

We have produced a stretchable form of silicon that consists ofsub-micrometer single crystal elements structured into shapes withmicroscale periodic, wave-like geometries. When supported by anelastomeric substrate, this ‘wavy’ silicon can be reversibly stretchedand compressed to large strains without damaging the silicon. Theamplitudes and periods of the waves change to accommodate thesedeformations, thereby avoiding significant strains in the siliconitself. Dielectrics, patterns of dopants, electrodes and other elementsdirectly integrated with the silicon yield fully formed, highperformance ‘wavy’ metal oxide semiconductor field effect transistors,pn diodes and other devices for electronic circuits that can bestretched or compressed to similarly large levels of strain.

Progress in electronics is driven mainly by efforts to increase circuitoperating speeds and integration densities, to reduce their powerconsumption and, for display systems, to enable large area coverage. Amore recent direction seeks to develop methods and materials that enablehigh performance circuits to be formed on unconventional substrates withunusual form factors: flexible plastic substrates for paperlike displaysand optical scanners, spherically curved supports for focal plane arraysand conformable skins for integrated robotic sensors. Many electronicmaterials can provide good bendability when prepared in thin film formand placed on thin substrate sheets or near neutral mechanical planes insubstrate laminates. In those cases, the strains experienced by theactive materials during bending can remain well below typical levelsrequired to induce fracture (˜1%). Full stretchability, a much morechallenging characteristic, is required for devices that can flex,stretch or reach extreme levels of bending as they are operated or forthose that can be conformally wrapped around supports with complex,curvilinear shapes. In these systems, strains at the circuit level canexceed the fracture limits of nearly all known electronic materials,especially those that are well developed for established applications.This problem can be circumvented, to some extent, with circuits that usestretchable conducting wires to interconnect electronic components (e.g.transistors) supported by rigid, isolated islands. Promising results canbe obtained with this strategy, although it is best suited toapplications that can be achieved with active electronics at relativelylow coverages. We report a different approach, in which stretchabilityis achieved directly in thin films of high quality single crystalsilicon that have micron scale periodic, ‘wave’-like geometries. Thesestructures accommodate large compressive and tensile strains throughchanges in the wave amplitudes and wavelengths rather than throughpotentially destructive strains in the materials themselves. Integratingsuch stretchable ‘wavy’ silicon elements with dielectrics, patterns ofdopants and thin metal films leads to high performance, stretchableelectronic devices.

FIG. 10 presents a fabrication sequence for wavy single crystal siliconribbons on elastomeric (i.e. rubber) substrates. The first step (topframe) involves photolithography to define a resist layer on asilicon-on-insulator (SOI) wafer, followed by etching to remove theexposed parts of the top silicon. Removing the resist with acetone andthen etching the buried SiO₂ layer with concentrated hydrofluoric acidreleases the ribbons from the underlying silicon substrate. The ends ofthe ribbons connect to the wafer to prevent them from washing away inthe etchant. The widths (5˜50 μm) and lengths (˜15 mm) of the resistlines define the dimensions of the ribbons. The thickness of the topsilicon (20˜320 nm) on the SOI wafers defines the ribbon thicknesses. Inthe next step (middle frame), a flat elastomeric substrate(poly(dimethylsiloxane), PDMS; 1˜3 mm thick) is elastically stretchedand then brought into conformal contact with the ribbons. Peeling thePDMS away lifts the ribbons off of the wafer and leaves them adhered tothe PDMS surface. Releasing the strain in the PDMS (i.e. the prestrain)leads to surface deformations that cause well-defined waves to form inthe silicon and the PDMS surface. (FIGS. 11A and 11B) The reliefprofiles are sinusoidal (top frame, FIG. 11C) with periodicities between5 and 50 μm and amplitudes between 100 nm and 1.5 μm, depending on thethickness of the silicon and the magnitude of prestrain in the PDMS. Fora given system, the periods and amplitudes of the waves are uniform towithin ˜5%, over large areas (˜cm²). The flat morphology of the PDMSbetween the ribbons and the absence of correlated phases in waves ofadjacent ribbons suggest that the ribbons are not strongly coupledmechanically. FIG. 11C (bottom frame) shows micro Raman measurements ofthe Si peak, measured as a function of distance along one of the wavyribbons. The results provide insights into the stress distributions.

The behavior in this static wavy configuration is consistent withnon-linear analysis of the initial buckled geometry in a uniform, thinhigh modulus layer on a semi-infinite low modulus support:

$\begin{matrix}{{\lambda_{0} = \frac{\pi\; h}{\sqrt{ɛ_{c}}}},{A_{0} = {h\sqrt{\frac{ɛ_{pre}}{ɛ_{c}} - 1}}}} & (1)\end{matrix}$where

$ɛ_{c} = {0.52\left\lbrack \frac{E_{PDMS}\left( {1 - v_{Si}^{2}} \right)}{E_{Si}\left( {1 - v_{PDMS}^{2}} \right)} \right\rbrack}^{2/3}$is the critical strain for buckling, ε_(pre) is the level of prestrain,λ₀ is the wavelength and A₀ is the amplitude. The Poisson ratio is ν,the Young's modulus is E, and the subscripts refer to properties of theSi or PDMS. The thickness of the silicon is h. This treatment capturesmany features of the as-fabricated wavy structures. FIG. 11D shows, forexample, that when the prestrain value is fixed (˜0.9% for these data),the wavelengths and amplitudes both depend linearly on the Si thickness.The wavelengths do not depend on the level of prestrain (FIG. 12).Furthermore, calculations that use literature values for the mechanicalproperties of the Si and PDMS (E_(Si)=130 GPa, E_(PDMS)=2 MPa,ν_(Si)=0.27, ν_(PDMS)=0.48) yield amplitudes and wavelengths that arewithin ˜10% (maximum deviation) of the measured values. The “ribbonstrain” is computed from the ratio of the effective lengths of theribbons (as determined from the wavelength) to their actual lengths (asdetermined from surface distances measured by AFM), and yield valuesthat are approximately equal to the prestrain in the PDMS, forprestrains up to ˜3.5%. The peak (i.e. maximum) strains in the siliconitself, which we refer to as silicon strains, are estimated from theribbon thicknesses and radii of curvature at the extrema of the wavesaccording to κh/2, where κ is the curvature, in regimes of strain wherethe waves exist and where the critical strain (˜0.03% for the casesexamined here) is small compared to the peak strains associated withbending. For the data of FIG. 11, the peak silicon strains are˜0.36(±0.08)%, which is more than a factor of two smaller than theribbon strains. This silicon strain is the same for all ribbonthicknesses, for a given prestrain (FIG. 13). The resulting mechanicaladvantage, in which the peak silicon strain is substantially less thanthe ribbon strain, is critically important for achieving stretchability.We note that buckled thin films have also been observed in metals anddielectrics evaporated or spin cast onto PDMS (in contrast to preformed,transferred single crystal elements and devices, as described herein).

The dynamic response of the wavy structures to compressive and tensilestrains applied to the elastomeric substrate after fabrication is ofprimary importance for stretchable electronic devices. To reveal themechanics of this process, we measure the geometries of wavy Si ribbonsby AFM as force is applied to the PDMS to compress or stretch itparallel to the long dimension of the ribbons. This force createsstrains both along the ribbons and perpendicular to them, due to thePoisson effect. The perpendicular strains lead primarily to deformationsof the PDMS in the regions between the ribbons. The strains along theribbons, on the other hand, are accommodated by changes in the structureof the waves. The three-dimensional height images and surface profilesin FIG. 14A present representative compressed, unperturbed and stretchedstates (collected from slightly different locations on the sample). Inthese and other cases, the ribbons maintain their sinusoidal (lines inthe right hand frames of FIG. 14A) shapes during deformation, in whichapproximately half of the wave structure lies beneath the unperturbedposition of the PDMS surface as defined by the regions between theribbons (FIG. 15). FIG. 14B shows the wavelength and amplitude forcompressive (negative) and tensile (positive) applied strains relativeto the unperturbed state (zero). The data correspond to averaged AFMmeasurements collected from a large number (>50) of ribbons per point.The applied strains are determined from the measured end-to-enddimensional changes of the PDMS substrate. Direct surface measurementsby AFM as well as contour integrals evaluated from the sinusoidal waveshapes show that the applied strains are equal to the ribbons strains(FIG. 16) for the cases examined here. (The small amplitude (<5 nm)waves that persist at tensile strains larger than the prestrain minusthe critical strain might result from slight slippage of the Si duringthe initial buckling process. The computed peak silicon strains andribbon strains in this small (or zero) amplitude regime underestimatethe actual values.) Interestingly, the results indicate two physicallydifferent responses of the wavy ribbons to applied strain. In tension,the waves evolve in a non-intuitive way: the wavelength does not changeappreciably with applied strain, consistent with post-bucklingmechanics. Instead, changes in amplitude accommodate the strain. In thisregime, the silicon strain decreases as the PDMS is stretched; itreaches ˜0% when the applied strain equals the prestrain. By contrast,in compression, the wavelengths decrease and amplitudes increase withincreasing applied strain. This mechanical response is similar to thatof an accordion bellows, which is qualitatively different than thebehavior in tension. During compression, the silicon strain increaseswith the applied strain, due to the decreasing radii of curvature at thewave peaks and troughs. The rates of increase and magnitudes of thesilicon strains are, however, both much lower than the ribbon strains,as shown in FIG. 14B. This mechanics enables stretchability.

The full response in regimes of strain consistent with the wavygeometries can be quantitatively described by equations that give thedependence of the wavelength λ on its value in the initial buckledstate, λ₀, and the applied strain ε_(applied) according to:

$\begin{matrix}{\lambda = \left\{ {\begin{matrix}\lambda_{0} & {{for}\mspace{14mu}{tension}} \\{\lambda_{0}\left( {1 + ɛ_{applied}} \right)} & {{for}\mspace{14mu}{compression}}\end{matrix},} \right.} & (2)\end{matrix}$This tension/compression asymmetry can arise, for example, from slight,reversible separations between the PDMS and the raised regions of Si,formed during compression. For this case, as well as for systems that donot exhibit this asymmetric behavior, the wave amplitude A, for bothtension and compression, is given by a single expression, valid formodest strains (<10-15%):

$\begin{matrix}{{A = {\sqrt{A_{0}^{2} - {h^{2}\frac{ɛ_{applied}}{ɛ_{c}}}} = {h\sqrt{\frac{ɛ_{pre} - ɛ_{applied}}{ɛ_{c}} - 1}}}},} & (3)\end{matrix}$where A₀ is the value corresponding to the initial buckled state. Theseexpressions yield quantitative agreement with the experiments withoutany parameter fitting, as shown in FIG. 14A. When the waviness, whichaccommodates the tensile/compressive strains, remains, the peak siliconstrain is dominated by the bending term and is given by (33)

$\begin{matrix}{{ɛ_{Si}^{peak} = {2\; ɛ_{c}\sqrt{\frac{ɛ_{pre} - ɛ_{applied}}{ɛ_{c}} - 1}}},} & (4)\end{matrix}$which agrees well with the strain measured from curvature, in FIG. 14B.(See also FIG. 18). Such an analytic expression is useful to define therange of applied strain that the system can sustain without fracturingthe silicon. For a prestrain of 0.9%, this range is −27% to 2.9%, if weassume that the silicon failure strain is ˜2% (for either compression ortension). Controlling the level of prestrain allows this range ofstrains (i.e. nearly 30%) to balance desired degrees of compressive andtensile deformability. For example, a prestrain of 3.5% (the maximumthat we examined) yields a range of −24% to 5.5%. We note that suchcalculations assume that the applied strain equals the ribbons strain,even at extreme levels of deformation. Experimentally, we find thatthese estimates are often exceeded due to the ability of the PDMS beyondthe ends of the ribbons and between the ribbons to accommodate strainsso that the applied strain is not completely transferred to the ribbons.

We have created functional, stretchable devices by including at thebeginning of the fabrication sequence (FIG. 10, top frame) additionalsteps to define patterns of dopants in the silicon, thin metal contactsand dielectric layers using conventional processing techniques. Two andthree terminal devices, diodes and transistors respectively, fabricatedin this manner provide basic building blocks for circuits with advancedfunctionality. A dual transfer process in which the integrated ribbondevices are first lifted off of the SOI onto an undeformed PDMS slab,and then to a prestrained PDMS substrate created wavy devices with metalcontacts exposed for probing. FIGS. 17A and 17B show optical images andelectrical responses of a stretchable pn-junction diode for variouslevels of strain applied to the PDMS. We observe no systematic variationin the electrical properties of the devices with stretching orcompressing, to within the scatter of the data. The deviation in thecurves is due mainly to variations in the quality of probe contacts.These pn-junction diodes can be used as a photodetector (atreverse-biased state) or as photovoltaic devices, in addition to normalrectifying devices. The photocurrent density is ˜35 mA/cm² at a reversebias voltage of ˜−1 V. At forward bias, the short-circuit currentdensity and open-circuit voltage are ˜17 mA/cm² and 0.2V, respectively,which yields a fill factor of 0.3. The shape of the response isconsistent with modeling (solid curves in FIG. 17B). The deviceproperties do not change significantly, even after ˜100 cycles ofcompressing, stretching and releasing (FIG. 19). FIG. 17C showscurrent-voltage characteristics of a stretchable, wavy silicon Schottkybarrier metal oxide semiconductor field effect transistor (MOSFET)formed with procedures similar to those used for the pn diode, and withan integrated thin layer (40 nm) of thermal SiO₂ as a gate dielectric(33). The device parameters extracted from electrical measurements ofthis wavy transistor—linear regime mobility ˜100 cm²/Vs (likely contactlimited), threshold voltage ˜−3 V—are comparable those of devices formedon the SOI wafers using the same processing conditions. (FIGS. 20 and21). As with the pn diodes, these wavy transistors can be reversiblystretched and compressed to large levels of strain without damaging thedevices or significantly altering the electrical properties. In both thediodes and the transistors, deformations in the PDMS beyond the ends ofthe devices lead to device (ribbon) strains that are smaller than theapplied strains. The overall stretchability results from the combinedeffects of device stretchability and these types of PDMS deformations.At compressive strains larger than those examined here, the PDMS tendedto bend in a manner that made probing difficult. At larger tensilestrains, the ribbons either fractured, or slipped and remained intact,depending on the silicon thickness, the ribbon lengths and the strengthof bonding between the silicon and PDMS.

These stretchable silicon MOSFETs and pn diodes represent only two ofthe many classes of ‘wavy’ electronic devices that can be formed.Completed circuit sheets or thin silicon plates can also be structuredinto uniaxial or biaxial stretchable wavy geometries. Besides the uniquemechanical characteristics of wavy devices, the coupling of strain toelectronic properties, which occurs in many semiconductors, providesopportunities to design device structures that exploit mechanicallytunable, periodic variations in strain to achieve unusual electronicresponses.

Materials and Methods

Sample Preparation: The silicon-on-insulator (SOI) wafers consist of Si(thicknesses of 20, 50, 100, 205, 290 or 320 nm) on SiO₂ (thicknesses of145 nm, 145 nm, 200 nm, 400 nm, 400 nm or 1 μm) on Si substrates(Soitec, Inc.). In one case, we use an SOI wafer of Si (thickness of˜2.5 μm) and SiO₂ (thickness of ˜1.5 μm) on Si (Shin-Etsu). In allcases, the top Si layer has a resistivity between 5˜20 Ωcm, doped withboron (p-type) or phosphorous (n-type). The top Si of these SOI wafersis patterned with photolithoresist (AZ 5214 photoresist, Karl Suss MJB-3contact mask aligner) and reactive ion etched (RIE) to define the Siribbons (5˜50 μm wide, 15 mm long) (PlasmaTherm RIE, SF6 40 sccm, 50mTorr, 100 W). The SiO₂ layer is removed by undercut etching in HF(49%);the etching time is mainly dependent on the width of the Si ribbons. Thelateral etch rate is typically 2˜3 μm/min. Slabs ofpoly(dimethylsiloxane) (PDMS) elastomer (Sylgard 184, Dow Corning) areprepared by mixing base and curing agent in a 10:1 weight ratio andcuring at 70° C. for >2 hrs or at room temperature for >12 hrs.

These flat slabs of PDMS (thicknesses of 1˜3 mm) are brought intoconformal contact with the Si on the etched SOI wafer to generate thewavy structures. Any method that creates controlled expansion of thePDMS prior to this contact followed by contraction after removal fromthe wafer, can be used. We examine three different techniques. In thefirst, mechanical rolling of PDMS after contacting the SOI substratecreated the prestrains. Although the wavy structures could be made inthis manner, they tended to have non-uniform wave periods andamplitudes. In the second, heating the PDMS (coefficient of thermalexpansion=3.1*10⁻⁴ K⁻¹) to temperatures of between 30° C. and 180° C.before contact and then cooling it after removal from the SOI, generatedwavy Si structures with excellent uniformity over large areas, in ahighly reproducible fashion. With this method, we control the prestrainlevel in PDMS very accurately by changing the temperature (FIG. 12). Thethird method uses PDMS stretched with mechanical stages before contactwith the SOI and then physically released after removal. Like thethermal approach, this method enabled good uniformity andreproducibility, but is more difficult to finely tune the prestrainlevel, compared to the thermal method.

For the devices such as pn junction diodes and transistors, electronbeam evaporated (Temescal BJD1800) and photolithographically patterned(through etching or liftoff) metal layers (Al, Cr, Au) serve as contactsand gate electrodes. Spin-on-dopants (SOD) (B-75X, Honeywell, USA forp-type; P509, Filmtronics, USA for n-type) are used to dope the siliconribbons. The SOD materials are first spin-coated (4000 rpm, 20 s) ontopre-patterned SOI wafers. A silicon dioxide layer (300 nm) prepared byplasma-enhanced chemical vapor deposition (PECVD) (PlasmaTherm) is usedas a mask for the SOD. After heating at 950° C. for 10 sec, both the SODand masking layer on SOI wafer are etched away using 6:1 buffered oxideetchant (BOE). For the transistor devices, thermally grown (1100° C.,10˜20 min. dry oxidation with high purity oxygen flow in furnace tothicknesses between 25 nm and 45 nm) silicon dioxide provide the gatedielectric. After completing all device processing steps on the SOIsubstrate, the Si ribbons (typically 50 μm wide, 15 mm long) withintegrated device structures are covered by photoresist (AZ5214 orShipley S1818) to protect the device layer during HF etching of theunderlying SiO₂. After removing the photoresist layer by oxygen plasma,a flat PDMS (70° C., >4 hrs) slab without any prestrain is used toremove the ribbon devices from the SOI substrate, in a flat geometry. Aslab of partially cured PDMS (>12 hrs at room temperature after mixingthe base and curing agent) is then contacted to the Si ribbon devices onthe fully cured PDMS slab. Completing the curing of the partially curedPDMS (by heating at 70° C.), followed by removal of this slab, transferthe devices from the first PDMS slab to this new PDMS substrate. Theshrinkage associated with cooling down to room temperature creates aprestrain such that removal and release creates the wavy devices, withelectrodes exposed for probing.

Measurements: Atomic force microscopy (AFM) (DI-3100, Veeco) is used tomeasure the wave properties (wavelength, amplitude) precisely. From theacquired images, the sectional profiles along the wavy Si are measuredand analyzed statistically. A home built stretching stage was used,together with the AFM and a semiconductor parameter analyzer (Agilent,5155C) to measure the mechanical and electrical responses of wavySi/PDMS. Raman measurements are performed with Jobin Yvon HR 800spectrometric analyzer using the 632.8 nm light from a He-Ne laser. TheRaman spectrum is measured at 1 μm intervals along the wavy Si, with afocus adjusted at each position along the lengths of the structures tomaximize the signal. The measured spectrum is fitted by Lorentzianfunctions to locate the peak wavenumber. Due to the slight dependence ofthe peak wavenumbers on the focal position of the microscope, the Ramanresults only provide qualitative insights into the stress distributions.

Calculation of Contour Length, Ribbon Strain and Silicon Strain: Theexperimental results show that, for the range of materials andgeometries explored here, the shape of wavy Si can be accuratelyrepresented with simple sine functions, i.e., y=Asin(kx) (k=2π/λ). Thecontour length is then calculated as L=∫₀ ^(λ)√{square root over (1+y′²)}dx. The ribbon strain of wavy Si is calculated using

$ɛ = {\frac{{\lambda - L}}{\lambda}.}$The peak silicon strains occur at peaks and troughs of the waves, andare calculated using

${ɛ_{Si}^{peak} = \frac{h}{2\; R_{c}}},$where h is the Si thickness, and R_(c) is the radius of curvature atpeak or trough, which is given by

${{R_{c} = {- \frac{1}{y^{''}}}}}_{x = {\pm {\lbrack\frac{{({{2n} - 1})}\pi}{2k}\rbrack}}}$where n is an integer and y″ is the second derivative of y with respectto x. Using the sine function approximation to the actual shape, thesilicon peak strain is given by

$ɛ_{Si}^{peak} = {\frac{2\;\pi^{2}A\; h}{\lambda^{2}}.}$FIG. 12 shows the wavelength as a function of temperature used to createthe prestrain. As shown by FIG. 13, the peak strain is independent of Sithickness h due to the linear dependence of the wave amplitude andwavelength on thickness (A˜h, λ˜h). FIG. 15 shows that wavy structuresinvolve nearly equal upward and downward displacements relative to thelevel of the PDMS surface between the ribbons. The silicon ribbon strainis equal to the applied strain for the systems examined here (FIG. 16).

An accordion bellows model: When the silicon can separate from the PDMSin compression, the system is governed by accordion bellows mechanics,rather than by buckling mechanics. In the bellows case, the wavelengthfor compressive applied strains (ε_(applied)) is λ₀(1+ε_(applied)) whereλ is the wavelength in the unstrained configuration, as described by Eq.(2). Since the contour length of the silicon ribbon is approximately thesame, prior to and after compressive strain, we can use the followingrelation to determine the wave amplitude A.

${\int_{0}^{\lambda_{0}}{\sqrt{1 + \left\lbrack \left( {A_{0}\sin\frac{2\;\pi}{\lambda_{0}}x} \right)^{\prime} \right\rbrack^{2}}{\mathbb{d}x}}} = {\int_{0}^{\lambda_{0}{({1 + ɛ_{applied}})}}{\sqrt{1 + \left\lbrack \left( {{Asin}\frac{2\;\pi}{\lambda_{0}\left( {1 + ɛ_{applied}} \right)}x} \right)^{\prime} \right\rbrack^{2}}{\mathbb{d}x}}}$This equation has the asymptotic solution

$A = {\sqrt{1 + ɛ_{applied}}\sqrt{A_{0}^{2} - {h^{2}\frac{ɛ_{applied}}{ɛ_{c}}}}}$for

$\frac{A_{0}}{\lambda_{0}}{\operatorname{<<}1.}$At small compressive strain, this equation reduces to Eq. (3), whichapplies also to the case where separation of the Si from the PDMS is notpossible and the system follows buckling mechanics. The peak siliconstrain is given by

$ɛ_{Si}^{peak} = {\frac{2\; ɛ_{c}}{\left( {1 + ɛ_{applied}} \right)^{3/2}}{\sqrt{\frac{ɛ_{pre} - ɛ_{applied}}{ɛ_{c}} - 1}.}}$For modest compressive strains, this expression is approximately thesame as Eq. (4). The peak silicon strains, like the wave amplitudes,have similar functional forms for both the bellows and the bucklingmodels, in the limit of modest applied strains. FIG. 18 shows the peakstrain computed according to the expression above, and according to Eq.(4).

Device Characterization: A semiconductor parameter analyzer (Agilent,5155C) and a conventional probing station are used for the electricalcharacterization of the wavy pn junction diodes and transistors. Thelight response of pn-diode is measured under an illumination intensityof ˜1 W/cm², as measured by an optical power meter (Ophir Optronics,Inc., Laser Power Meter AN/2). We use mechanical stages to measure thedevices during and after stretching and compressing. As a means toexplore the reversibility of the process, we measure three different pndiodes before and after ˜100 cycles of compressing (to ˜5% strains),stretching (to ˜15% strains) and releasing, in ambient light. FIG. 19shows the results. FIGS. 20 and 21 show images, schematic illustrationsand device measurements from the wavy transistors.

EXAMPLE 2 Buckled and Wavy Ribbons of GaAs for High-PerformanceElectronics on Elastomeric Substrates

Single crystalline GaAs ribbons with thicknesses in the submicron rangeand well-defined, ‘wavy’ and/or ‘buckled’ geometries are fabricated. Theresulting structures, on the surface of or embedded in an elastomericsubstrate, exhibit reversible stretchability and compressibility tostrains>10%, more than ten times larger than that of GaAs itself. Byintegrating ohmic and Schottky contacts on these structured GaAsribbons, high-performance stretchable electronic devices (e.g.,metal-semiconductor field-effect transistors) can be achieved. This kindof electronic system can be used alone or in combination with similarlydesigned silicon, dielectric and/or metal materials to form circuits forapplications that demand high frequency operation together withstretchability, extreme flexibility or ability to conform to surfaceswith complex curvilinear shapes.

Performance capabilities in traditional microelectronics are measuredmainly in terms of speed, power efficiency and level of integration.Progress in other, more recent forms of electronics, is driven insteadby the ability to achieve integration on unconventional substrates(e.g., low-cost plastics, foils, paper) or to cover large-areas. Forexample, new forms of X-ray medical diagnosis are achievable withlarge-area imagers that conformally wrap around the body to digitallyimage desired tissues. Lightweight, wall-size displays or sensors thatcan be deployed onto a variety of surfaces and surface shapes providenew technologies for architectural design. Various materials includingsmall organic molecules, polymers, amorphous silicon, polycrystallinesilicon,^(]) single crystalline silicon nanowires and microstructuredribbons have been explored to serve as semiconductor channels for thetype of thin film electronics that might support these and otherapplications. These materials enable transistors with mobilities thatspan a wide range (i.e., from 10⁻⁵ to 500 cm²/V·s), and in mechanicallybendable thin film formats on flexible substrates. Applications withdemanding high speed operations, such as large-aperture interferometricsynthetic aperture radar (InSAR) and radio frequency (RF) surveillancesystems, require semiconductors with much higher mobilities, such asGaAs, or InP, etc. The fragility of single crystalline compoundsemiconductors creates a number of fabrication challenges that must beovercome in order to fabricate high-speed, flexible transistors withthem. We establish a practical approach to build metal-semiconductorfield-effect transistors (MESFETs) on plastic substrates by usingprinted GaAs wire arrays created from high-quality bulk wafers. Thesedevices exhibit excellent mechanical flexibility and f_(T)'s thatapproach 2 GHz, even in moderately scaled devices (e.g. micron gatelengths). This example demonstrates GaAs ribbon based MESFETs (asopposed to wire devices) designed with special geometries that providenot only bendability, but mechanical stretchability to levels of strain(˜10%) that significantly exceed the intrinsic yield points of the GaAsitself (˜2%). The resulting type of stretchable high performanceelectronic systems can provide extremely high levels of bendability andthe capacity to integrate conformally with curvilinear surfaces. ThisGaAs system example extends our described ‘wavy’ silicon in fourimportant ways: (i) it demonstrates stretchability in GaAs, a materialthat is, in practical terms, much more mechanically fragile than Si,(ii) it introduces a new ‘buckled’ geometry that can be used forstretchability together with or independently of the previouslydescribed ‘wavy’ configuration, (iii) it achieves a new class ofstretchable device (i.e. the MESFET), and (iv) it demonstratesstretching over a larger range and with greater symmetry incompression/tension than that achieved in silicon.

FIG. 22 illustrates steps for fabricating stretchable GaAs ribbons on anelastomeric substrate made of poly(dimethylsiloxane) (PDMS). The ribbonsare generated from a high-quality bulk wafer of GaAs with multipleepitaxial layers. The wafer is prepared by growing a 200-nm thick AlAslayer on a (100) semi-insulating GaAs (SI—GaAs) wafer, followed bysequential deposition of a SI—GaAs layer with thickness of 150 nm andSi-doped n-type GaAs layer with thickness of 120 nm and carrierconcentration of 4×10¹⁷ cm⁻³. A pattern of photoresist lines definedparallel to the (0 ī ī) crystalline orientation serves as masks forchemical etching of the epilayers (including both GaAs and AlAs).Anisotropic etching with an aqueous etchant of H₃PO₄ and H₂O₂ isolatedthese top layers into individual bars with lengths and orientationsdefined by the photoresist, and with side walls that form acute anglesrelative to the wafer surface. Removing the photoresist after theanisotropic etching and then soaking the wafer in an ethanol solution ofHF (2:1 in volume between ethanol and 49% aqueous HF) removes the AlAslayer and released ribbons of GaAs (n-GaAs/SI—GaAs). The use of ethanol,instead of water, for this step reduces cracking that can occur in thefragile ribbons due to the action of capillary forces during drying. Thelower surface tension of ethanol compared to water also minimizesdrying-induced disorder in the spatial layout of the GaAs ribbons. Inthe next step, the wafer with released GaAs ribbons is contacted to thesurface of a prestretched flat slab of PDMS, with the ribbons alignedalong the direction of stretching. In this case, van der Waals forcesdominate the interaction between the PDMS and the GaAs. For cases thatrequire stronger interaction strength, we deposit a thin layer of SiO₂onto the GaAs, and expose the PDMS to ultraviolet induced ozone (i.e.,product of oxygen in air) immediately prior to contact. The ozonecreates —Si—OH groups on the surface of PDMS, which react with thesurface of the SiO₂ upon contact to form bridging siloxane —Si—O—Si—bonds. The deposited SiO₂ is discontinuous at the edges of each ribbonbecause of the geometry of their sidewalls. For both the weak and strongbonding procedures, peeling the PDMS from the mother wafer transfers allthe ribbons to the surface of the PDMS. Relaxing the prestrain in thePDMS led to the spontaneous formation of large scale buckles and/orsinusoidal wavy structures along the ribbons. The geometry of theribbons depends strongly on the prestrain (defined by ΔL/L) applied tothe stamp, the interaction between the PDMS and ribbons, and theflexural rigidity of the ribbons. For the ribbons investigated here,small prestrains (<2%) create highly sinusoidal ‘waves’ with relativelysmall wavelengths and amplitudes (FIG. 22 right, middle frame), for boththe strong and weak interaction cases. These geometries in GaAs aresimilar to those reported for Si. Higher prestrains (e.g., up to ˜15%)can be applied to create similar type of waves where there is a strongbonding interaction between the ribbons and the substrate. A differenttype of geometry, comprising of aperiodic ‘buckles’ with relativelylarge amplitudes and widths, formed in the case of weak interactionstrengths and large prestrains (FIG. 22 right, top frame). In addition,our results show that both kinds of structures—buckles and waves—cancoexist in a single ribbon whose flexural rigidity varies along itslength (due, for example, to thickness variations associated with devicestructures).

FIG. 23 shows several micrographs of wavy GaAs ribbons with thickness of270 nm (including both n-GaAs and SI—GaAs layers) and widths of 100 μm(all of the ribbons discussed in this example have widths of 100 μm)formed with strong bonding between PDMS (thickness of ˜5 mm) andribbons. The fabrication followed the procedures for strong bonding,using 2-nm Ti and 28-nm SiO₂ layers on the GaAs. A biaxial prestrain of˜1.9% (calculated from the thermal response of PDMS) is created in thePDMS by thermal expansion (heating to 90° C. in an oven) immediatelyprior to and during bonding. This heating also accelerates the formationof interfacial siloxane bonds. Cooling the PDMS to room temperature(˜27° C.) after transferring the GaAs ribbons released the prestrain.Frames A, B and C of FIG. 23 show images collected with an opticalmicroscope, scanning electron microscope (SEM) and atomic forcemicroscope (AFM), respectively, from the same sample. The images showthe formation of periodic, wavy structures in the GaAs ribbons. Thewaves are quantitatively analyzed by evaluating linecuts (FIGS. 23E and23F) from AFM image (FIG. 23D). The contour parallel to the longitudinaldirection of the ribbon clearly shows a periodic, wavy profile,consistent with a computed fit to a sine wave (dashed line of FIG. 23E).This result agrees with nonlinear analysis of the initial buckledgeometry in a uniform, thin, high-modulus layer on a semi-infinitelow-modulus support. The peak-to-peak amplitude and wavelengthassociated with this function are determined to be 2.56 and 35.0 μm,respectively. The strains computed from the ratio of the horizontaldistances between the adjacent two peaks on the stamp (i.e., thewavelength) to their actual contour lengths between the peaks (i.e., thesurface distances measured by AFM), which we refer to as ribbon strains,yield values (i.e., 1.3%) that are smaller than the prestrain in thePDMS. This difference might be attributed to low shear modulus of PDMSand island effects related to the length of GaAs ribbons being shorterthan the length of PDMS substrate. The surface strain of GaAs ribbons atpeaks and troughs, which we refer to as maximum GaAs strains, isestimated from the ribbon thicknesses and radii of curvature at thepeaks or troughs of the waves according to κh/2, where κ is thecurvature. In this evaluation, the direct contribution of strains in thePDMS stamp to the GaAs are ignored because the PDMS can be treated as asemi-infinite support whose modulus is low compared to that of GaAs(Young's Modulus of GaAs: 85.5 GPa versus that of PDMS: 2 MPa). For thedata of FIG. 23E, the maximum GaAs strains are ˜0.62%, which is morethan a factor of two smaller than the ribbon strain (i.e., 1.3%). Thismechanical advantage provides stretchability in the GaAs ribbons, withphysics similar to that found for wavy Si.

As shown in FIG. 23F, the peak and trough regions of the ribbons arehigher and lower than the contour level (right portion of the greencurve) of the surface of pristine PDMS (i.e., the areas withoutribbons), respectively. The result suggests that the PDMS under the GaAsadopts a wavy profile as a result of the upward and downward forcesimparted to the PDMS by the GaAs ribbons in the peaks and troughs,respectively. The precise geometry of the PDMS near the peaks of thewaves is difficult to evaluate directly. We suspect that in addition tothe upward deformation there is also a lateral necking caused by thePoisson effect. The wavy ribbons on the PDMS stamp can be stretched andcompressed by applying strains to the PDMS (so-called applied straindenoted as positive for stretching and negative for compression,respectively). The insets of FIGS. 23A and 23B show images of theribbons that deformed to their original, flat geometry when a relativelysmall stretching strain (i.e., ˜1.5%) was applied. Further stretchingtransfers more tensile strain to the flat GaAs ribbons, resulting intheir breakage of ribbons when this excess strain reaches the failurestrain of GaAs. Compressive strains applied to the substrate reduce thewavelengths and increase the amplitudes of the wavy ribbons. Failure incompression occurs when the bending strains at peaks (and troughs)exceed the failure strains. This variation of wavelength with strain isconsistent with previous observations in silicon, and is different thanthe predictions of wavelength invariance derived from ideal models.

The stretchability of wavy GaAs ribbons can be improved by increasingthe prestrain applied to PDMS through the use of a mechanical stage (asopposed to thermal expansion). For example, transferring GaAs ribbonswith SiO₂ layers onto the surface of a PDMS stamp with prestrain of 7.8%generated wavy ribbons without any observable cracking in the GaAs (FIG.24A). The bending strains at the peaks in this case are estimated to be˜1.2%, which is lower than the failure strain (i.e., ˜2%) of GaAs.Similar to the low prestrain case, the wavy ribbons behave like anaccordion when the system is stretched and compressed: the wavelengthsand amplitudes change to accommodate the applied strain. As shown inFIG. 24A, the wavelengths increase with tensile strain until the ribbonsbecome flat and decrease with compressive strain until the ribbonsbreak. These deformations are completely reversible, and do not involveany measurable slipping of the GaAs on the PDMS. The wavelength changeslinearly with applied strains in both compression and tension (see, theblack lines and symbols in FIG. 24B), in contrast to the mildlyasymmetric behavior observed in Si ribbons with weak bonding and muchlower prestrains.

In practical applications, it might be useful to encapsulate the GaAsribbons and devices in a way that maintains their stretchability. As asimple demonstration of one possibility, we cast and cured PDMSpre-polymers on samples such as the one shown in FIG. 24A to embed theribbons in PDMS. The embedded systems exhibit similar mechanicalbehavior to the unembedded ones, i.e., stretching the system increaseswavelength and compressing the system decreases wavelength (the redlines and symbols in FIG. 24B). Shrinkage due to curing the second layerof PDMS generated some moderate amount of additional strain (˜1%). Thisstrain resulted in a slight decrease in the wavelength of the wavyribbons, thereby expanding slightly the range of stretchability. FIG.24B shows the difference. Overall, the systems generated with prestrainof ˜7.8% can be stretched or compressed to strains of up to ˜10% withoutinducing any observable breakage in the GaAs.

The wavy GaAs ribbons on PDMS substrates can be used to fabricatehigh-performance electronic devices, such as MESFETs, the electrodes ofwhich are formed through metallization and processing on the wafer,before transfer to PDMS. These metal layers change the flexural rigidityof the ribbons in a spatially dependent manner. FIG. 25A shows GaAsribbons integrated with ohmic stripes (source and drain electrodes) andSchottky contacts (gate electrodes) after transfer to a PDMS substratewith prestrain of ˜1.9%. The ohmic contacts consisted of metal stacksincluding AuGe (70 nm)/Ni (10 nm)/Au (70 nm) formed on the originalwafers through lithographically defined masks along with sequentialannealing of the wafers at elevated temperature (i.e., 450° C. for 1min) in a quartz tube with flowing N₂. These ohmic segments have lengthsof 500 μm. The distances between two adjacent ohmic contacts are 500 μm(i.e., channel length). Schottky contacts with lengths of 240 μm (i.e.,gate length) are generated by directly depositing 75-nm Cr layer and75-nm Au layer through electron-beam evaporation against thephotolithographically designed mask. The electrodes have widths equal tothe GaAs ribbons, i.e., 100 μm; their relatively large sizes facilitateprobing. The dimensions of electrodes and semiconductor channels can besignificantly decreased to achieve enhanced device performance. As shownin FIG. 25A, these stretchable GaAs MESFETS exhibit, shortrange,periodic waves only in the regions without electrodes. The absence ofwaves in the thicker regions might be attributed to their enhancedflexural rigidity due mainly to the additional thickness associated withthe metals. Periodic waves can be initiated in the thicker regions byusing prestrains larger than ˜3%. In these cases, however, the ribbonstend to break at the edges of the metal electrodes due to critical flawsand/or high peak strains near these edges. This failure mode limits thestretchability.

To circumvent this limitation, we reduced the strength of interactionbetween the MESFETs and the PDMS by eliminating the siloxane bonding.For such samples, prestrain>3% generated large, aperiodic buckles withrelatively large widths and amplitudes due to physical detachment of theribbons from PDMS surface. FIG. 25B presents this type of system, asprepared with a prestrain of ˜7%, in which the big buckles form in thethinner regions of the devices. The detachment seems to extend slightlyto the thicker sections with ohmic stripes, as indicated by the verticallines. The contrast variation along ribbons is attributed to reflectionsand refraction associated passage of light through the curved GaAssegments. The SEM image (FIG. 25C) clearly shows the formation ofarc-shape buckles and flat, unperturbed PDMS. These buckles displayasymmetric profiles (as indicated by the red curves) with tails to thesides with ohmic contacts. This asymmetry might be attributed to theunequal lengths (500 μm versus 240 μm) of ohmic stripes and Schottkycontacts for individual transistors. This kind of buckled MESFET can bestretched to its original flat status (FIG. 25D) with applied stretchingstrains between ˜6% and ˜7%. However, compressing the system shown inFIG. 25B leads to continuous detachment of ribbons from PDMS surface toform larger buckles because of weak bonding. Embedding such devices inPDMS, according to the previously described procedures, eliminates thistype of uncontrolled behavior. FIG. 25B shows such a system, in whichthe liquid PDMS precursor fills the gaps underneath the buckles. Thefully surrounding PDMS confines the ribbons and prevents them fromsliding and detaching. The embedded devices can be reversibly stretchedand compressed to strains up to ˜6% without breaking the ribbons. It isnotable that when the embedded system was compressed by −5.83% (topframe of FIG. 25E), periodic, small waves formed in the regions withmetal electrodes as well as new ripples in the buckled regions. Theformation of these new small waves, in combination with the largebuckles, enhances the compressibility. Stretching the system forces thebuckled regions to compress and stretch the PDMS in a manner thatenables some flattening of these buckles, thereby elongating theprojected lengths of the ribbons (bottom frame of FIG. 25E). Theseresults suggest that embedded devices with big buckles, which is ageometry distinct from the waves, represent a promising method toachieve stretchability and compressibility that can be used incombination with or separately from the wavy approach.

The performance of buckled devices can be evaluated by directly probingthe current flow from source to drain. FIG. 26A shows GaAs-ribbondevices fabricated on a wafer, picked up using a flat PDMS stamp andtransfer printed onto a PDMS substrate with a prestrain of 4.7%. In thisconfiguration, the metal electrodes are exposed to air for electricalprobing. After the prestretched PDMS is relaxed to a strain of 3.4%,periodic small waves formed in the thin regions of the MESFET (FIG. 26A:second frame from the top). When the prestretched PDMS stamp is fullyrelaxed, the small waves in each segment of pure GaAs coalesced into anindividual big buckle (FIG. 26A: third frame from the top). The buckleddevices can be stretched to their flat status with applied stretchingstrain of 4.7% (FIG. 26A: bottom frame). The IV curves of the samedevice with applied strains of 0.0% (FIG. 26A: third frame from the top)and 4.7% (FIG. 26A: bottom frame) are plotted in FIG. 26B with red andblack colors, respectively. The results indicate that the current flowfrom source to drain of buckled MESFETs on PDMS substrates can be wellmodulated with the voltages applied to the gate and that the appliedstretching strain generates only a minor effect on device performance.

In summary, this example discloses an approach to form ‘buckled’ and‘wavy’ GaAs ribbons on and embedded in PDMS elastomeric substrates. Thegeometrical configurations of these ribbons depend on the level ofprestrain used in the fabrication, the interaction strength between thePDMS and ribbons, and on the thicknesses and types of materials used.Buckled and wavy ribbons of GaAs multilayer stacks and fully formedMESFET devices show large levels of compressibility/stretchability, dueto the ability of their geometries to adjust in a manner that canaccommodate applied strains without transferring those strains to thematerials themselves. Successful realization of large levels ofmechanical stretchability (and, as a result, other attractive mechanicalcharacteristics such as extreme bendability) in an intrinsically fragilematerial like GaAs provides similar strategies applicable to a widerange of other materials classes.

The thermally-induced prestrain is ascribed to thermal expansion of PDMSstamp, which has the bulk linear coefficient of thermal expansion ofα_(L)=3.1×10⁻⁴ μm/μm/° C. On the other hand, the coefficient of thermalexpansion for GaAs is only 5.73×10⁻⁶ μm/μm/° C. Therefore, the prestrainon PDMS (relatively GaAs ribbons) for the sample that was prepared at90° C. and cooled down to 27° C. is determined according toΔα_(L)×ΔT=(3.1×10⁻⁴−5.73×10⁻⁶)×(90−27)=1.9%.

Methods: GaAs wafers with customer-designed epitaxial layers arepurchased from IQE Inc., Bethlehem, Pa. The lithographic processesemployed AZ photoresist, i.e., AZ 5214 and AZ nLOF 2020 for positive andnegative imaging, respectively. The GaAs wafers with photoresist maskpatterns are anisotropically etched in the etchant (4 mL H₃PO₄ (85 wt%), 52 mL H₂O₂ (30 wt %), and 48 mL deionized water) that is cooled inthe ice-water bath. The AlAs layers are dissolved with a diluted HFsolution (Fisher® Chemicals) in ethanol (1:2 in volume). The sampleswith released ribbons on mother wafers are dried in a fume hood. Thedried samples are placed in the chamber of electron-beam evaporator(Temescal FC-1800) and coated with sequential layers of 2-nm Ti and28-nm SiO₂. The metals for the MESFET devices are deposited byelectron-beam evaporation before removal of AlAs layers. PDMS stamp withthickness of ˜5 mm is prepared by pouring the mixture of low-modulusPDMS (A:B=1:10, Sylgard 184, Dow Corning) onto a piece of silicon waferpre-modified with monolayer of(tridecafluoro-1,1,2,2-tetrahydrooctyl)-1-trichlorosilane, followed bybaking at 65° C. for 4 hrs. In order to generate strong bonding, thestamps are exposed to UV light for 5 minutes. In the transfer process,the stamps are stretched through thermal expansion (in oven) and/ormechanical forces. The wafers with released ribbons are then laminatedon the surfaces of the stretched PDMS stamps and left in contact atelevated temperatures (dependent on the required prestrains) for 5minutes. The mother wafers are peeled from the stamps and all theribbons are transferred to stamps. The prestrains applied to the stampsare released through cooling down to room temperature and/or removingthe mechanical forces, resulting in the formation of wavy profiles alongthe ribbons. In the mechanical evaluations, we use a specially designedstage to stretch as well as compress the PDMS stamps with ‘wavy’ and‘buckled’ GaAs ribbons.

EXAMPLE 3 Two-Dimensional Stretchable Semiconductors

The present invention provides stretchable semiconductors andstretchable electronic devices capable of stretching, compressing and/orflexing in more than one direction, including directions orientedorthogonal to each other. Stretchable semiconductors and stretchableelectronic devices of this aspect of the present invention exhibit goodmechanical and electronic properties and/or device performance whenstretched and/or compressed in more than one direction.

FIGS. 27A-C provides images at different degrees of magnification of astretchable silicon semiconductor of the present invention exhibitingstretchability in two dimensions. The stretchable semiconductor shown inFIG. 27A-B was prepared by pre-straining an elastic substrate viathermal expansion.

FIGS. 28A-C provide images of three different structural conformationsof stretchable semiconductors of the present invention exhibitingstretchability in two dimensions. As shown, the semiconductor structuresin FIG. 28A exhibit an edge line wavy conformation, the semiconductorstructures in FIG. 28B exhibit a Herringbone wavy conformation and thesemiconductor structures in FIG. 28C exhibit a random wavy conformation.

FIGS. 29A-D provide images of stretchable semiconductors of the presentinvention fabricated via prestraining an elastic substrate via thermalexpansion.

FIG. 30 shows optical images of stretchable semiconductors exhibitingstretchability in two dimensions prepared via prestraining an elasticsubstrate via thermal expansion. FIG. 30 shows images corresponding to avariety of stretching and compression conditions.

FIG. 31A shows an optical image of stretchable semiconductors exhibitingstretchability in two dimensions fabricated via prestraining an elasticsubstrate via thermal expansion. FIGS. 31B and 31C provide experimentalresults relating to the mechanical properties of the stretchablesemiconductors shown in FIG. 31A.

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STATEMENTS REGARDING INCORPORATION BY REFERENCE AND VARIATIONS

The following references relate to self assembly techniques which may beused in methods of the present invention to transfer, assembly andinterconnect printable semiconductor elements via contact printingand/or solution printing techniques and are incorporated by reference intheir entireties herein: (1) “Guided molecular self-assembly: a reviewof recent efforts”, Jiyun C Huie Smart Mater. Struct.. (2003) 12,264-271; (2) “Large-Scale Hierarchical Organization of Nanowire Arraysfor Integrated Nanosystems”, Whang, D.; Jin, S.; Wu, Y.; Lieber, C. M.Nano Lett.. (2003) 3(9), 1255-1259; (3) “Directed Assembly ofOne-Dimensional Nanostructures into Functional Networks”, Yu Huang,Xiangfeng Duan, Qingqiao Wei, and Charles M. Lieber, Science (2001) 291,630-633; and (4) “Electric-field assisted assembly and alignment ofmetallic nanowires”, Peter A. Smith et al., Appl. Phys. Lett.. (2000)77(9), 1399-1401.

All references throughout this application, for example patent documentsincluding issued or granted patents or equivalents; patent applicationpublications; unpublished patent applications; and non-patent literaturedocuments or other source material; are hereby incorporated by referenceherein in their entireties, as though individually incorporated byreference, to the extent each reference is at least partially notinconsistent with the disclosure in this application (for example, areference that is partially inconsistent is incorporated by referenceexcept for the partially inconsistent portion of the reference).

Any appendix or appendices hereto are incorporated by reference as partof the specification and/or drawings.

Where the terms “comprise”, “comprises”, “comprised”, or “comprising”are used herein, they are to be interpreted as specifying the presenceof the stated features, integers, steps, or components referred to, butnot to preclude the presence or addition of one or more other feature,integer, step, component, or group thereof. Separate embodiments of theinvention are also intended to be encompassed wherein the terms“comprising” or “comprise(s)” or “comprised” are optionally replacedwith the terms, analogous in grammar, e.g.; “consisting/consist(s)” or“consisting essentially of/consist(s) essentially of” to therebydescribe further embodiments that are not necessarily coextensive.

The invention has been described with reference to various specific andpreferred embodiments and techniques. However, it should be understoodthat many variations and modifications may be made while remainingwithin the spirit and scope of the invention. It will be apparent to oneof ordinary skill in the art that compositions, methods, devices, deviceelements, materials, procedures and techniques other than thosespecifically described herein can be applied to the practice of theinvention as broadly disclosed herein without resort to undueexperimentation. All art-known functional equivalents of compositions,methods, devices, device elements, materials, procedures and techniquesdescribed herein are intended to be encompassed by this invention.Whenever a range is disclosed, all subranges and individual values areintended to be encompassed as if separately set forth. This invention isnot to be limited by the embodiments disclosed, including any shown inthe drawings or exemplified in the specification, which are given by wayof example or illustration and not of limitation. The scope of theinvention shall be limited only by the claims.

We claim:
 1. A two-dimensionally stretchable electronic devicecomprising: a flexible substrate having a supporting surface; and asemiconductor structure supported by said supporting surface and havinga spatially-varying contour profile that varies in at least two lateralspatial dimensions relative to the supporting surface, wherein thesemiconductor structure is discontinuously bonded to said supportingsurface; and wherein the contour profile varying in at least two spatialdimensions accommodates stretching, compressing, and/or flexing in morethan one direction without device failure.
 2. The two-dimensionallystretchable electronic device of claim 1, wherein said two lateralspatial dimensions are orthogonal relative to each other.
 3. Thetwo-dimensionally stretchable electronic device of claim 1, wherein saidspatially varying contour profile is a herringbone wavy conformation, ora random wavy conformation.
 4. The two-dimensionally stretchableelectronic device of claim 1, wherein the semiconductor structurecomprises a buckled region that is physically separated from saidsupporting surface.
 5. The two-dimensionally stretchable electronicdevice of claim 4, further comprising an encapsulating layer positionedon said supporting surface and said semiconductor structure to embedsaid buckled region.
 6. The two-dimensionally stretchable electronicdevice of claim 1, further comprising an encapsulating layer that atleast partially embeds said semiconductor structure.
 7. Thetwo-dimensionally stretchable electronic device of claim 6, wherein theencapsulation layer comprises a polymer.
 8. The two-dimensionallystretchable electronic device of claim 6, wherein the encapsulationlayer comprises a polyimide.
 9. The two-dimensionally stretchableelectronic device of claim 1, wherein the flexible substrate comprises apolymer or paper.
 10. The two-dimensionally stretchable electronicdevice of claim 1, wherein said spatially-varying contour profilecomprises a combination of convex and concave regions.
 11. Thetwo-dimensionally stretchable electronic device of claim 1, wherein saidspatially-varying contour profile is periodic in at least one of saidtwo lateral spatial dimensions.
 12. The two-dimensionally stretchableelectronic device of claim 1, wherein said spatially-varying contourprofile is aperiodic in at least one of said two lateral spatialdimensions.
 13. The two-dimensionally stretchable electronic device ofclaim 1, wherein said spatially-varying contour profile has aperiodicity of between 500 nm to 100 μm.
 14. The two-dimensionallystretchable electronic device of claim 1, wherein said spatially-varyingcontour profile has an amplitude of between 50 nm and 5 μm.
 15. Thetwo-dimensionally stretchable electronic device of claim 1, furthercomprising an adhesive layer to bond said semiconductor structure tosaid supporting surface.
 16. The two-dimensionally stretchableelectronic device of claim 1, further comprising a metal layer, apolymer layer, or a partial polymerized polymer precursor layer thatbonds said semiconductor structure to said supporting surface.
 17. Thetwo-dimensionally stretchable electronic device of claim 1, wherein thesemiconductor structure comprises a single crystalline material selectedfrom the group consisting of: Si, Ge, SiC, AlP, AlAs, AlSb, GaN, GaP,GaAs, GaSb, InP, InAs, InSb, ZnO, ZnSe, ZnTe, CdS, CdSe, CdTe, HgS, PbS,PbSe, PbTe, AlGaAs, AlInAs, AlInP, GaAsP, GaInAs, GaInP, AlGaAsSb,AlGaInP, GaInAsP, AlN, GaAlN, CdTe, and AlGaInAs.
 18. Thetwo-dimensionally stretchable electronic device of claim 1 configuredfor deformation from a planar shape into a curved shape with a strainintroduction to the semiconductor structure that is less than 0.5%.